5 #ifndef V8_FIELD_INDEX_INL_H_
6 #define V8_FIELD_INDEX_INL_H_
14 inline FieldIndex FieldIndex::ForInObjectOffset(
int offset, Map*
map) {
18 return FieldIndex(
true, index,
false, index + 1, 0,
true);
20 int first_inobject_offset =
map->GetInObjectPropertyOffset(0);
21 if (offset < first_inobject_offset) {
22 return FieldIndex(
true, index,
false, 0, 0,
true);
29 inline FieldIndex FieldIndex::ForPropertyIndex(Map*
map,
33 int inobject_properties =
map->inobject_properties();
34 bool is_inobject = property_index < inobject_properties;
35 int first_inobject_offset;
37 first_inobject_offset =
map->GetInObjectPropertyOffset(0);
40 property_index -= inobject_properties;
42 return FieldIndex(is_inobject,
44 is_double, inobject_properties, first_inobject_offset);
50 inline FieldIndex FieldIndex::ForLoadByFieldIndex(Map*
map,
int orig_index) {
51 int field_index = orig_index;
52 int is_inobject =
true;
53 bool is_double = field_index & 1;
54 int first_inobject_offset = 0;
56 if (field_index < 0) {
57 field_index = -(field_index + 1);
62 first_inobject_offset =
map->GetInObjectPropertyOffset(0);
65 FieldIndex result(is_inobject, field_index, is_double,
66 map->inobject_properties(), first_inobject_offset);
67 DCHECK(result.GetLoadByFieldIndex() == orig_index);
75 inline int FieldIndex::GetLoadByFieldIndex()
const {
90 return is_double() ? (result | 1) : result;
94 inline FieldIndex FieldIndex::ForDescriptor(Map*
map,
int descriptor_index) {
95 PropertyDetails details =
96 map->instance_descriptors()->GetDetails(descriptor_index);
98 map->instance_descriptors()->GetFieldIndex(descriptor_index);
99 return ForPropertyIndex(
map, field_index,
100 details.representation().IsDouble());
104 inline FieldIndex FieldIndex::ForKeyedLookupCacheIndex(Map*
map,
int index) {
105 if (FLAG_compiled_keyed_generic_loads) {
106 return ForLoadByFieldIndex(
map, index);
108 return ForPropertyIndex(
map, index);
113 inline FieldIndex FieldIndex::FromFieldAccessStubKey(
int key) {
114 return FieldIndex(key);
118 inline int FieldIndex::GetKeyedLookupCacheIndex()
const {
119 if (FLAG_compiled_keyed_generic_loads) {
120 return GetLoadByFieldIndex();
122 return property_index();
static const int kHeaderSize
static const int kHeaderSize
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf map
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be NULL
#define DCHECK(condition)
Debugger support for the V8 JavaScript engine.