V8 Project
lithium-inl.h
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1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4 
5 #ifndef V8_LITHIUM_INL_H_
6 #define V8_LITHIUM_INL_H_
7 
8 #include "src/lithium.h"
9 
10 #if V8_TARGET_ARCH_IA32
11 #include "src/ia32/lithium-ia32.h" // NOLINT
12 #elif V8_TARGET_ARCH_X64
13 #include "src/x64/lithium-x64.h" // NOLINT
14 #elif V8_TARGET_ARCH_ARM64
15 #include "src/arm64/lithium-arm64.h" // NOLINT
16 #elif V8_TARGET_ARCH_ARM
17 #include "src/arm/lithium-arm.h" // NOLINT
18 #elif V8_TARGET_ARCH_MIPS
19 #include "src/mips/lithium-mips.h" // NOLINT
20 #elif V8_TARGET_ARCH_MIPS64
21 #include "src/mips64/lithium-mips64.h" // NOLINT
22 #elif V8_TARGET_ARCH_X87
23 #include "src/x87/lithium-x87.h" // NOLINT
24 #else
25 #error "Unknown architecture."
26 #endif
27 
28 namespace v8 {
29 namespace internal {
30 
31 TempIterator::TempIterator(LInstruction* instr)
32  : instr_(instr), limit_(instr->TempCount()), current_(0) {
33  SkipUninteresting();
34 }
35 
36 
37 bool TempIterator::Done() { return current_ >= limit_; }
38 
39 
40 LOperand* TempIterator::Current() {
41  DCHECK(!Done());
42  return instr_->TempAt(current_);
43 }
44 
45 
46 void TempIterator::SkipUninteresting() {
47  while (current_ < limit_ && instr_->TempAt(current_) == NULL) ++current_;
48 }
49 
50 
51 void TempIterator::Advance() {
52  ++current_;
53  SkipUninteresting();
54 }
55 
56 
57 InputIterator::InputIterator(LInstruction* instr)
58  : instr_(instr), limit_(instr->InputCount()), current_(0) {
59  SkipUninteresting();
60 }
61 
62 
63 bool InputIterator::Done() { return current_ >= limit_; }
64 
65 
66 LOperand* InputIterator::Current() {
67  DCHECK(!Done());
68  DCHECK(instr_->InputAt(current_) != NULL);
69  return instr_->InputAt(current_);
70 }
71 
72 
73 void InputIterator::Advance() {
74  ++current_;
75  SkipUninteresting();
76 }
77 
78 
79 void InputIterator::SkipUninteresting() {
80  while (current_ < limit_) {
81  LOperand* current = instr_->InputAt(current_);
82  if (current != NULL && !current->IsConstantOperand()) break;
83  ++current_;
84  }
85 }
86 
87 
88 UseIterator::UseIterator(LInstruction* instr)
89  : input_iterator_(instr), env_iterator_(instr->environment()) {}
90 
91 
92 bool UseIterator::Done() {
93  return input_iterator_.Done() && env_iterator_.Done();
94 }
95 
96 
97 LOperand* UseIterator::Current() {
98  DCHECK(!Done());
99  LOperand* result = input_iterator_.Done() ? env_iterator_.Current()
100  : input_iterator_.Current();
101  DCHECK(result != NULL);
102  return result;
103 }
104 
105 
106 void UseIterator::Advance() {
107  input_iterator_.Done() ? env_iterator_.Advance() : input_iterator_.Advance();
108 }
109 }
110 } // namespace v8::internal
111 
112 #endif // V8_LITHIUM_INL_H_
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be NULL
#define DCHECK(condition)
Definition: logging.h:205
Debugger support for the V8 JavaScript engine.
Definition: accessors.cc:20