5 #ifndef V8_REGEXP_MACRO_ASSEMBLER_IRREGEXP_H_
6 #define V8_REGEXP_MACRO_ASSEMBLER_IRREGEXP_H_
13 #ifdef V8_INTERPRETED_REGEXP
15 class RegExpMacroAssemblerIrregexp:
public RegExpMacroAssembler {
30 RegExpMacroAssemblerIrregexp(Vector<byte>, Zone* zone);
31 virtual ~RegExpMacroAssemblerIrregexp();
33 virtual int stack_limit_slack() {
return 1; }
34 virtual bool CanReadUnaligned() {
return false; }
35 virtual void Bind(Label* label);
36 virtual void AdvanceCurrentPosition(
int by);
37 virtual void PopCurrentPosition();
38 virtual void PushCurrentPosition();
39 virtual void Backtrack();
40 virtual void GoTo(Label* label);
41 virtual void PushBacktrack(Label* label);
42 virtual bool Succeed();
44 virtual void PopRegister(
int register_index);
45 virtual void PushRegister(
int register_index,
46 StackCheckFlag check_stack_limit);
47 virtual void AdvanceRegister(
int reg,
int by);
48 virtual void SetCurrentPositionFromEnd(
int by);
49 virtual void SetRegister(
int register_index,
int to);
50 virtual void WriteCurrentPositionToRegister(
int reg,
int cp_offset);
51 virtual void ClearRegisters(
int reg_from,
int reg_to);
52 virtual void ReadCurrentPositionFromRegister(
int reg);
53 virtual void WriteStackPointerToRegister(
int reg);
54 virtual void ReadStackPointerFromRegister(
int reg);
55 virtual void LoadCurrentCharacter(
int cp_offset,
56 Label* on_end_of_input,
57 bool check_bounds =
true,
59 virtual void CheckCharacter(
unsigned c, Label* on_equal);
60 virtual void CheckCharacterAfterAnd(
unsigned c,
63 virtual void CheckCharacterGT(
uc16 limit, Label* on_greater);
64 virtual void CheckCharacterLT(
uc16 limit, Label* on_less);
65 virtual void CheckGreedyLoop(Label* on_tos_equals_current_position);
66 virtual void CheckAtStart(Label* on_at_start);
67 virtual void CheckNotAtStart(Label* on_not_at_start);
68 virtual void CheckNotCharacter(
unsigned c, Label* on_not_equal);
69 virtual void CheckNotCharacterAfterAnd(
unsigned c,
72 virtual void CheckNotCharacterAfterMinusAnd(
uc16 c,
76 virtual void CheckCharacterInRange(
uc16 from,
79 virtual void CheckCharacterNotInRange(
uc16 from,
81 Label* on_not_in_range);
82 virtual void CheckBitInTable(Handle<ByteArray> table, Label* on_bit_set);
83 virtual void CheckNotBackReference(
int start_reg, Label* on_no_match);
84 virtual void CheckNotBackReferenceIgnoreCase(
int start_reg,
86 virtual void IfRegisterLT(
int register_index,
int comparand, Label* if_lt);
87 virtual void IfRegisterGE(
int register_index,
int comparand, Label* if_ge);
88 virtual void IfRegisterEqPos(
int register_index, Label* if_eq);
90 virtual IrregexpImplementation Implementation();
91 virtual Handle<HeapObject> GetCode(Handle<String> source);
96 inline void EmitOrLink(Label* label);
106 Vector<byte> buffer_;
113 int advance_current_start_;
114 int advance_current_offset_;
115 int advance_current_end_;
119 static const int kInvalidPC = -1;
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be expose gc extension under the specified name show built in functions in stack traces use random jit cookie to mask large constants minimum length for automatic enable preparsing CPU profiler sampling interval in microseconds trace out of bounds accesses to external arrays default size of stack region v8 is allowed to maximum length of function source code printed in a stack trace min size of a semi the new space consists of two semi spaces print one trace line following each garbage collection do not print trace line after scavenger collection print cumulative GC statistics in only print modified registers Trace simulator debug messages Implied by trace sim abort randomize hashes to avoid predictable hash Fixed seed to use to hash property Print the time it takes to deserialize the snapshot A filename with extra code to be included in the A file to write the raw snapshot bytes to(mksnapshot only)") DEFINE_STRING(raw_context_file
#define DISALLOW_IMPLICIT_CONSTRUCTORS(TypeName)
Debugger support for the V8 JavaScript engine.