#include <instruction.h>
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typedef BitField< size_t, 0, 8 > | OutputCountField |
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typedef BitField< size_t, 8, 16 > | InputCountField |
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typedef BitField< size_t, 24, 6 > | TempCountField |
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typedef BitField< bool, 30, 1 > | IsCallField |
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typedef BitField< bool, 31, 1 > | IsControlField |
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InstructionCode | opcode_ |
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uint32_t | bit_field_ |
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PointerMap * | pointer_map_ |
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InstructionOperand * | operands_ [1] |
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Definition at line 546 of file instruction.h.
◆ InnerPosition
Enumerator |
---|
BEFORE | |
START | |
END | |
AFTER | |
FIRST_INNER_POSITION | |
LAST_INNER_POSITION | |
Definition at line 548 of file instruction.h.
◆ GapInstruction()
v8::internal::compiler::GapInstruction::GapInstruction |
( |
InstructionCode |
opcode | ) |
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inlineexplicitprotected |
Definition at line 584 of file instruction.h.
ParallelMove * parallel_moves_[LAST_INNER_POSITION+1]
InstructionCode opcode() const
Instruction(InstructionCode opcode)
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be NULL
References AFTER, BEFORE, END, NULL, parallel_moves_, and START.
Referenced by New().
◆ cast() [1/2]
◆ cast() [2/2]
◆ GetOrCreateParallelMove()
ParallelMove* v8::internal::compiler::GapInstruction::GetOrCreateParallelMove |
( |
InnerPosition |
pos, |
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Zone * |
zone |
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) |
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inline |
◆ GetParallelMove()
ParallelMove* v8::internal::compiler::GapInstruction::GetParallelMove |
( |
InnerPosition |
pos | ) |
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inline |
◆ New()
◆ operator<<
Definition at line 253 of file instruction.cc.
254 if (instr.OutputCount() > 1) os <<
"(";
255 for (
size_t i = 0;
i < instr.OutputCount();
i++) {
256 if (
i > 0) os <<
", ";
257 os << *instr.OutputAt(
i);
260 if (instr.OutputCount() > 1) os <<
") = ";
261 if (instr.OutputCount() == 1) os <<
" = ";
263 if (instr.IsGapMoves()) {
265 os << (instr.IsBlockStart() ?
" block-start" :
"gap ");
269 if (gap->parallel_moves_[
i] !=
NULL) os << *gap->parallel_moves_[
i];
272 }
else if (instr.IsSourcePosition()) {
273 const SourcePositionInstruction* pos =
274 SourcePositionInstruction::cast(&instr);
275 os <<
"position (" << pos->source_position().raw() <<
")";
279 if (am != kMode_None) {
284 os <<
" && " << fm <<
" if "
288 if (instr.InputCount() > 0) {
289 for (
size_t i = 0;
i < instr.InputCount();
i++) {
290 os <<
" " << *instr.InputAt(
i);
static T decode(uint32_t value)
static GapInstruction * cast(Instruction *instr)
◆ parallel_moves_
The documentation for this class was generated from the following file: