V8 Project
generic-algorithm.h
Go to the documentation of this file.
1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4 
5 #ifndef V8_COMPILER_GENERIC_ALGORITHM_H_
6 #define V8_COMPILER_GENERIC_ALGORITHM_H_
7 
8 #include <stack>
9 
12 #include "src/zone-containers.h"
13 
14 namespace v8 {
15 namespace internal {
16 namespace compiler {
17 
18 // GenericGraphVisit allows visitation of graphs of nodes and edges in pre- and
19 // post-order. Visitation uses an explicitly allocated stack rather than the
20 // execution stack to avoid stack overflow. Although GenericGraphVisit is
21 // primarily intended to traverse networks of nodes through their
22 // dependencies and uses, it also can be used to visit any graph-like network
23 // by specifying custom traits.
25  public:
26  enum Control {
27  CONTINUE = 0x0, // Continue depth-first normally
28  SKIP = 0x1, // Skip this node and its successors
29  REENTER = 0x2, // Allow reentering this node
30  DEFER = SKIP | REENTER
31  };
32 
33  // struct Visitor {
34  // Control Pre(Traits::Node* current);
35  // Control Post(Traits::Node* current);
36  // void PreEdge(Traits::Node* from, int index, Traits::Node* to);
37  // void PostEdge(Traits::Node* from, int index, Traits::Node* to);
38  // }
39  template <class Visitor, class Traits, class RootIterator>
40  static void Visit(GenericGraphBase* graph, Zone* zone,
41  RootIterator root_begin, RootIterator root_end,
42  Visitor* visitor) {
43  typedef typename Traits::Node Node;
44  typedef typename Traits::Iterator Iterator;
45  typedef std::pair<Iterator, Iterator> NodeState;
46  typedef std::stack<NodeState, ZoneDeque<NodeState> > NodeStateStack;
47  NodeStateStack stack((ZoneDeque<NodeState>(zone)));
48  BoolVector visited(Traits::max_id(graph), false, zone);
49  Node* current = *root_begin;
50  while (true) {
51  DCHECK(current != NULL);
52  const int id = current->id();
53  DCHECK(id >= 0);
54  DCHECK(id < Traits::max_id(graph)); // Must be a valid id.
55  bool visit = !GetVisited(&visited, id);
56  if (visit) {
57  Control control = visitor->Pre(current);
58  visit = !IsSkip(control);
59  if (!IsReenter(control)) SetVisited(&visited, id, true);
60  }
61  Iterator begin(visit ? Traits::begin(current) : Traits::end(current));
62  Iterator end(Traits::end(current));
63  stack.push(NodeState(begin, end));
64  Node* post_order_node = current;
65  while (true) {
66  NodeState top = stack.top();
67  if (top.first == top.second) {
68  if (visit) {
69  Control control = visitor->Post(post_order_node);
70  DCHECK(!IsSkip(control));
71  SetVisited(&visited, post_order_node->id(), !IsReenter(control));
72  }
73  stack.pop();
74  if (stack.empty()) {
75  if (++root_begin == root_end) return;
76  current = *root_begin;
77  break;
78  }
79  post_order_node = Traits::from(stack.top().first);
80  visit = true;
81  } else {
82  visitor->PreEdge(Traits::from(top.first), top.first.edge().index(),
83  Traits::to(top.first));
84  current = Traits::to(top.first);
85  if (!GetVisited(&visited, current->id())) break;
86  }
87  top = stack.top();
88  visitor->PostEdge(Traits::from(top.first), top.first.edge().index(),
89  Traits::to(top.first));
90  ++stack.top().first;
91  }
92  }
93  }
94 
95  template <class Visitor, class Traits>
96  static void Visit(GenericGraphBase* graph, Zone* zone,
97  typename Traits::Node* current, Visitor* visitor) {
98  typename Traits::Node* array[] = {current};
99  Visit<Visitor, Traits>(graph, zone, &array[0], &array[1], visitor);
100  }
101 
102  template <class B, class S>
106  void PreEdge(GenericNode<B, S>* from, int index, GenericNode<B, S>* to) {}
107  void PostEdge(GenericNode<B, S>* from, int index, GenericNode<B, S>* to) {}
108  };
109 
110  private:
111  static bool IsSkip(Control c) { return c & SKIP; }
112  static bool IsReenter(Control c) { return c & REENTER; }
113 
114  // TODO(turbofan): resizing could be optionally templatized away.
115  static void SetVisited(BoolVector* visited, int id, bool value) {
116  if (id >= static_cast<int>(visited->size())) {
117  // Resize and set all values to unvisited.
118  visited->resize((3 * id) / 2, false);
119  }
120  visited->at(id) = value;
121  }
122 
123  static bool GetVisited(BoolVector* visited, int id) {
124  if (id >= static_cast<int>(visited->size())) return false;
125  return visited->at(id);
126  }
127 };
128 }
129 }
130 } // namespace v8::internal::compiler
131 
132 #endif // V8_COMPILER_GENERIC_ALGORITHM_H_
static bool GetVisited(BoolVector *visited, int id)
static void Visit(GenericGraphBase *graph, Zone *zone, typename Traits::Node *current, Visitor *visitor)
static void Visit(GenericGraphBase *graph, Zone *zone, RootIterator root_begin, RootIterator root_end, Visitor *visitor)
static void SetVisited(BoolVector *visited, int id, bool value)
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be expose gc extension under the specified name show built in functions in stack traces use random jit cookie to mask large constants minimum length for automatic enable preparsing CPU profiler sampling interval in microseconds trace out of bounds accesses to external arrays default size of stack region v8 is allowed to maximum length of function source code printed in a stack trace min size of a semi the new space consists of two semi spaces print one trace line following each garbage collection do not print trace line after scavenger collection print cumulative GC statistics in only print modified registers Trace simulator debug messages Implied by trace sim abort randomize hashes to avoid predictable hash Fixed seed to use to hash property Print the time it takes to deserialize the snapshot A filename with extra code to be included in the A file to write the raw snapshot bytes to(mksnapshot only)") DEFINE_STRING(raw_context_file
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be NULL
#define DCHECK(condition)
Definition: logging.h:205
Debugger support for the V8 JavaScript engine.
Definition: accessors.cc:20
void PreEdge(GenericNode< B, S > *from, int index, GenericNode< B, S > *to)
void PostEdge(GenericNode< B, S > *from, int index, GenericNode< B, S > *to)