12 switch (instr->elements_kind()) {
29 return instr->IsShr() ||
30 (instr->IsLoadKeyed() &&
IsUnsignedLoad(HLoadKeyed::cast(instr))) ||
35 bool HUint32AnalysisPhase::IsSafeUint32Use(HValue* val, HValue*
use) {
37 if (
use->IsBitwise() ||
use->IsShl() ||
use->IsSar() ||
use->IsShr()) {
39 }
else if (
use->IsSimulate()) {
42 }
else if (
use->IsChange()) {
48 HChange::cast(
use)->
to().IsSmi() ||
49 HChange::cast(
use)->
to().IsTagged());
51 }
else if (
use->IsStoreKeyed()) {
52 HStoreKeyed* store = HStoreKeyed::cast(
use);
53 if (store->is_external()) {
56 if (store->value() == val) {
64 }
else if (
use->IsCompareNumericAndBranch()) {
80 bool HUint32AnalysisPhase::Uint32UsesAreSafe(HValue* uint32val) {
81 bool collect_phi_uses =
false;
82 for (HUseIterator it(uint32val->uses()); !it.Done(); it.Advance()) {
83 HValue*
use = it.value();
89 collect_phi_uses =
true;
96 if (!IsSafeUint32Use(uint32val,
use)) {
101 if (collect_phi_uses) {
102 for (HUseIterator it(uint32val->uses()); !it.Done(); it.Advance()) {
103 HValue*
use = it.value();
119 bool HUint32AnalysisPhase::CheckPhiOperands(HPhi* phi) {
125 for (
int j = 0; j < phi->OperandCount(); j++) {
126 HValue* operand = phi->OperandAt(j);
129 if (operand->IsInteger32Constant() &&
130 operand->GetInteger32Constant() >= 0) {
147 void HUint32AnalysisPhase::UnmarkPhi(HPhi* phi, ZoneList<HPhi*>* worklist) {
149 for (
int j = 0; j < phi->OperandCount(); j++) {
150 HValue* operand = phi->OperandAt(j);
153 if (operand->IsPhi()) {
154 worklist->Add(HPhi::cast(operand), zone());
161 void HUint32AnalysisPhase::UnmarkUnsafePhis() {
163 if (
phis_.length() == 0)
return;
167 ZoneList<HPhi*> worklist(
phis_.length(), zone());
179 for (
int i = 0;
i <
phis_.length();
i++) {
182 if (CheckPhiOperands(phi) && Uint32UsesAreSafe(phi)) {
183 phis_[phi_count++] = phi;
185 UnmarkPhi(phi, &worklist);
193 while (!worklist.is_empty()) {
194 while (!worklist.is_empty()) {
195 HPhi* phi = worklist.RemoveLast();
196 UnmarkPhi(phi, &worklist);
202 int new_phi_count = 0;
203 for (
int i = 0;
i < phi_count;
i++) {
206 if (CheckPhiOperands(phi)) {
207 phis_[new_phi_count++] = phi;
209 UnmarkPhi(phi, &worklist);
212 phi_count = new_phi_count;
218 if (!
graph()->has_uint32_instructions())
return;
221 for (
int i = 0;
i < uint32_instructions->length(); ++
i) {
227 Uint32UsesAreSafe(current)) {
static HValue * cast(HValue *value)
int32_t GetInteger32Constant()
bool IsInteger32Constant()
Representation representation() const
void Add(const T &element, AllocationPolicy allocator=AllocationPolicy())
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be expose gc extension under the specified name show built in functions in stack traces use random jit cookie to mask large constants minimum length for automatic enable preparsing CPU profiler sampling interval in microseconds trace out of bounds accesses to external arrays default size of stack region v8 is allowed to maximum length of function source code printed in a stack trace min size of a semi the new space consists of two semi spaces print one trace line following each garbage collection do not print trace line after scavenger collection print cumulative GC statistics in only print modified registers Trace simulator debug messages Implied by trace sim abort randomize hashes to avoid predictable hash Fixed seed to use to hash property Print the time it takes to deserialize the snapshot A filename with extra code to be included in the A file to write the raw snapshot bytes to(mksnapshot only)") DEFINE_STRING(raw_context_file
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be expose gc extension under the specified name show built in functions in stack traces use random jit cookie to mask large constants minimum length for automatic enable preparsing CPU profiler sampling interval in microseconds trace out of bounds accesses to external arrays default size of stack region v8 is allowed to use(in kBytes)") DEFINE_INT(max_stack_trace_source_length
#define DCHECK(condition)
static bool IsUnsignedLoad(HLoadKeyed *instr)
@ EXTERNAL_UINT16_ELEMENTS
@ EXTERNAL_UINT8_ELEMENTS
@ EXTERNAL_FLOAT32_ELEMENTS
@ EXTERNAL_FLOAT64_ELEMENTS
@ EXTERNAL_UINT32_ELEMENTS
@ EXTERNAL_UINT8_CLAMPED_ELEMENTS
static bool IsUint32Operation(HValue *instr)
Debugger support for the V8 JavaScript engine.