5 #ifndef V8_REGEXP_MACRO_ASSEMBLER_H_
6 #define V8_REGEXP_MACRO_ASSEMBLER_H_
14 RegExpCharacterClass
cc;
57 virtual void Bind(Label* label) = 0;
73 Label* on_no_match) = 0;
81 Label* on_not_equal) = 0;
87 Label* on_not_equal) = 0;
90 Label* on_in_range) = 0;
93 Label* on_not_in_range) = 0;
109 Label* on_no_match) {
114 virtual void GoTo(Label* label) = 0;
126 Label* on_end_of_input,
127 bool check_bounds =
true,
128 int characters = 1) = 0;
169 #ifndef V8_INTERPRETED_REGEXP
194 int offsets_vector_length,
227 const byte* input_start,
228 const byte* input_end,
virtual bool CanReadUnaligned()
static Address GrowStack(Address stack_pointer, Address *stack_top, Isolate *isolate)
NativeRegExpMacroAssembler(Zone *zone)
static const byte word_character_map[256]
static Result Execute(Code *code, String *input, int start_offset, const byte *input_start, const byte *input_end, int *output, int output_size, Isolate *isolate)
static Address word_character_map_address()
static Result Match(Handle< Code > regexp, Handle< String > subject, int *offsets_vector, int offsets_vector_length, int previous_index, Isolate *isolate)
static const byte * StringCharacterPosition(String *subject, int start_index)
static int CaseInsensitiveCompareUC16(Address byte_offset1, Address byte_offset2, size_t byte_length, Isolate *isolate)
virtual ~NativeRegExpMacroAssembler()
virtual void LoadCurrentCharacter(int cp_offset, Label *on_end_of_input, bool check_bounds=true, int characters=1)=0
virtual void CheckBitInTable(Handle< ByteArray > table, Label *on_bit_set)=0
virtual void PushRegister(int register_index, StackCheckFlag check_stack_limit)=0
virtual void Bind(Label *label)=0
virtual void PushBacktrack(Label *label)=0
virtual void IfRegisterEqPos(int reg, Label *if_eq)=0
virtual void CheckPosition(int cp_offset, Label *on_outside_input)
void set_global_mode(GlobalMode mode)
virtual void SetRegister(int register_index, int to)=0
void set_slow_safe(bool ssc)
virtual bool CheckSpecialCharacterClass(uc16 type, Label *on_no_match)
virtual void Backtrack()=0
virtual void CheckAtStart(Label *on_at_start)=0
virtual void CheckCharacterNotInRange(uc16 from, uc16 to, Label *on_not_in_range)=0
virtual void CheckCharacterAfterAnd(unsigned c, unsigned and_with, Label *on_equal)=0
virtual void CheckCharacterLT(uc16 limit, Label *on_less)=0
virtual void CheckNotCharacterAfterMinusAnd(uc16 c, uc16 minus, uc16 and_with, Label *on_not_equal)=0
virtual void CheckNotBackReference(int start_reg, Label *on_no_match)=0
static const int kMinCPOffset
virtual void SetCurrentPositionFromEnd(int by)=0
virtual void CheckCharacter(unsigned c, Label *on_equal)=0
virtual void ReadCurrentPositionFromRegister(int reg)=0
virtual void CheckCharacterGT(uc16 limit, Label *on_greater)=0
static const int kTableSizeBits
virtual void CheckCharacterInRange(uc16 from, uc16 to, Label *on_in_range)=0
@ GLOBAL_NO_ZERO_LENGTH_CHECK
virtual void IfRegisterLT(int reg, int comparand, Label *if_lt)=0
static const int kTableMask
virtual IrregexpImplementation Implementation()=0
virtual void PushCurrentPosition()=0
virtual void ReadStackPointerFromRegister(int reg)=0
@ kBytecodeImplementation
static const int kMaxRegister
static const int kMaxCPOffset
virtual void WriteStackPointerToRegister(int reg)=0
virtual void WriteCurrentPositionToRegister(int reg, int cp_offset)=0
bool global_with_zero_length_check()
virtual void CheckGreedyLoop(Label *on_tos_equals_current_position)=0
virtual Handle< HeapObject > GetCode(Handle< String > source)=0
virtual void AdvanceCurrentPosition(int by)=0
virtual bool CanReadUnaligned()=0
virtual int stack_limit_slack()=0
virtual void PopRegister(int register_index)=0
virtual void PopCurrentPosition()=0
virtual void CheckNotBackReferenceIgnoreCase(int start_reg, Label *on_no_match)=0
virtual void CheckNotCharacter(unsigned c, Label *on_not_equal)=0
virtual void GoTo(Label *label)=0
virtual ~RegExpMacroAssembler()
virtual void AdvanceRegister(int reg, int by)=0
static const int kTableSize
RegExpMacroAssembler(Zone *zone)
virtual void ClearRegisters(int reg_from, int reg_to)=0
virtual void IfRegisterGE(int reg, int comparand, Label *if_ge)=0
virtual void CheckNotAtStart(Label *on_not_at_start)=0
virtual void CheckNotCharacterAfterAnd(unsigned c, unsigned and_with, Label *on_not_equal)=0
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be expose gc extension under the specified name show built in functions in stack traces use random jit cookie to mask large constants minimum length for automatic enable preparsing CPU profiler sampling interval in microseconds trace out of bounds accesses to external arrays default size of stack region v8 is allowed to maximum length of function source code printed in a stack trace min size of a semi the new space consists of two semi spaces print one trace line following each garbage collection do not print trace line after scavenger collection print cumulative GC statistics in only print modified registers Trace simulator debug messages Implied by trace sim abort randomize hashes to avoid predictable hash Fixed seed to use to hash property Print the time it takes to deserialize the snapshot A filename with extra code to be included in the A file to write the raw snapshot bytes to(mksnapshot only)") DEFINE_STRING(raw_context_file
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long mode(MIPS only)") DEFINE_BOOL(enable_always_align_csp
Debugger support for the V8 JavaScript engine.