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v8::internal::compiler::BlockList Struct Reference
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Public Member Functions

BlockList * Add (Zone *zone, BasicBlock *b)
 
void Serialize (BasicBlockVector *final_order)
 

Public Attributes

BasicBlock * block
 
BlockList * next
 

Detailed Description

Definition at line 739 of file scheduler.cc.

Member Function Documentation

◆ Add()

BlockList* v8::internal::compiler::BlockList::Add ( Zone *  zone,
BasicBlock *  b 
)
inline

Definition at line 743 of file scheduler.cc.

743  {
744  BlockList* list = static_cast<BlockList*>(zone->New(sizeof(BlockList)));
745  list->block = b;
746  list->next = this;
747  return list;
748  }

References block, v8::internal::Zone::New(), and next.

Referenced by v8::internal::compiler::Scheduler::ComputeSpecialRPO().

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◆ Serialize()

void v8::internal::compiler::BlockList::Serialize ( BasicBlockVector *  final_order)
inline

Definition at line 750 of file scheduler.cc.

750  {
751  for (BlockList* l = this; l != NULL; l = l->next) {
752  l->block->rpo_number_ = static_cast<int>(final_order->size());
753  final_order->push_back(l->block);
754  }
755  }
NULL
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be NULL
Definition: flag-definitions.h:407

References NULL.

Referenced by v8::internal::compiler::Scheduler::ComputeSpecialRPO().

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Member Data Documentation

◆ block

BasicBlock* v8::internal::compiler::BlockList::block

Definition at line 740 of file scheduler.cc.

Referenced by Add(), and v8::internal::compiler::Scheduler::ComputeSpecialRPO().

◆ next

BlockList* v8::internal::compiler::BlockList::next

Definition at line 741 of file scheduler.cc.

Referenced by Add(), and v8::internal::compiler::Scheduler::ComputeSpecialRPO().

The documentation for this struct was generated from the following file: