V8 Project
transitions-inl.h File Reference
#include "src/transitions.h"
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Namespaces

 v8
 Debugger support for the V8 JavaScript engine.
 
 v8::internal
 

Macros

#define FIELD_ADDR(p, offset)    (reinterpret_cast<byte*>(p) + offset - kHeapObjectTag)
 
#define WRITE_FIELD(p, offset, value)    (*reinterpret_cast<Object**>(FIELD_ADDR(p, offset)) = value)
 
#define CONDITIONAL_WRITE_BARRIER(heap, object, offset, value, mode)
 

Macro Definition Documentation

◆ CONDITIONAL_WRITE_BARRIER

#define CONDITIONAL_WRITE_BARRIER (   heap,
  object,
  offset,
  value,
  mode 
)
Value:
heap->incremental_marking()->RecordWrite( \
object, HeapObject::RawField(object, offset), value); \
if (heap->InNewSpace(value)) { \
heap->RecordWrite(object->address(), offset); \
} \
}
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long mode(MIPS only)") DEFINE_BOOL(enable_always_align_csp
@ UPDATE_WRITE_BARRIER
Definition: objects.h:235

Definition at line 20 of file transitions-inl.h.

◆ FIELD_ADDR

#define FIELD_ADDR (   p,
  offset 
)     (reinterpret_cast<byte*>(p) + offset - kHeapObjectTag)

Definition at line 14 of file transitions-inl.h.

◆ WRITE_FIELD

#define WRITE_FIELD (   p,
  offset,
  value 
)     (*reinterpret_cast<Object**>(FIELD_ADDR(p, offset)) = value)

Definition at line 17 of file transitions-inl.h.