#include <instructions-arm64.h>

Inheritance diagram for v8::internal::InstructionSequence:

Collaboration diagram for v8::internal::InstructionSequence:

Public Member Functions
bool	IsInlineData () const

uint64_t	InlineData () const

Public Member Functions inherited from v8::internal::Instruction
Instr	InstructionBits () const

void	SetInstructionBits (Instr value)

int	Bit (int nr) const

int	Bits (int hi, int lo) const

int	BitField (int hi, int lo) const

Condition	ConditionValue () const

Condition	ConditionField () const

	DECLARE_STATIC_TYPED_ACCESSOR (Condition, ConditionValue)

	DECLARE_STATIC_TYPED_ACCESSOR (Condition, ConditionField)

int	TypeValue () const

int	SpecialValue () const

int	RnValue () const

	DECLARE_STATIC_ACCESSOR (RnValue)

int	RdValue () const

	DECLARE_STATIC_ACCESSOR (RdValue)

int	CoprocessorValue () const

int	VnValue () const

int	VmValue () const

int	VdValue () const

int	NValue () const

int	MValue () const

int	DValue () const

int	RtValue () const

int	PValue () const

int	UValue () const

int	Opc1Value () const

int	Opc2Value () const

int	Opc3Value () const

int	SzValue () const

int	VLValue () const

int	VCValue () const

int	VAValue () const

int	VBValue () const

int	VFPNRegValue (VFPRegPrecision pre)

int	VFPMRegValue (VFPRegPrecision pre)

int	VFPDRegValue (VFPRegPrecision pre)

int	OpcodeValue () const

Opcode	OpcodeField () const

int	SValue () const

int	RmValue () const

	DECLARE_STATIC_ACCESSOR (RmValue)

int	ShiftValue () const

ShiftOp	ShiftField () const

int	RegShiftValue () const

int	RsValue () const

int	ShiftAmountValue () const

int	RotateValue () const

	DECLARE_STATIC_ACCESSOR (RotateValue)

int	Immed8Value () const

	DECLARE_STATIC_ACCESSOR (Immed8Value)

int	Immed4Value () const

int	ImmedMovwMovtValue () const

	DECLARE_STATIC_ACCESSOR (ImmedMovwMovtValue)

int	PUValue () const

int	PUField () const

int	BValue () const

int	WValue () const

int	LValue () const

int	Offset12Value () const

int	RlistValue () const

int	SignValue () const

int	HValue () const

int	ImmedHValue () const

int	ImmedLValue () const

int	LinkValue () const

int	SImmed24Value () const

SoftwareInterruptCodes	SvcValue () const

bool	IsSpecialType0 () const

bool	IsMiscType0 () const

bool	IsNopType1 () const

bool	IsStop () const

bool	HasS () const

bool	HasB () const

bool	HasW () const

bool	HasL () const

bool	HasU () const

bool	HasSign () const

bool	HasH () const

bool	HasLink () const

double	DoubleImmedVmov () const

Instr	InstructionBits () const

void	SetInstructionBits (Instr new_instr)

int	Bit (int pos) const

uint32_t	Bits (int msb, int lsb) const

int32_t	SignedBits (int msb, int lsb) const

Instr	Mask (uint32_t mask) const

Instruction *	following (int count=1)

Instruction *	preceding (int count=1)

int	ImmPCRel () const

uint64_t	ImmLogical ()

float	ImmFP32 ()

double	ImmFP64 ()

LSDataSize	SizeLSPair () const

bool	IsCondBranchImm () const

bool	IsUncondBranchImm () const

bool	IsCompareBranch () const

bool	IsTestBranch () const

bool	IsImmBranch () const

bool	IsLdrLiteral () const

bool	IsLdrLiteralX () const

bool	IsPCRelAddressing () const

bool	IsAdr () const

bool	IsLogicalImmediate () const

bool	IsAddSubImmediate () const

bool	IsAddSubShifted () const

bool	IsAddSubExtended () const

bool	IsLoadOrStore () const

bool	IsLoad () const

bool	IsStore () const

Reg31Mode	RdMode () const

Reg31Mode	RnMode () const

ImmBranchType	BranchType () const

int	ImmBranch () const

bool	IsBranchAndLinkToRegister () const

bool	IsMovz () const

bool	IsMovk () const

bool	IsMovn () const

bool	IsNop (int n)

int64_t	ImmPCOffset ()

Instruction *	ImmPCOffsetTarget ()

bool	IsTargetInImmPCOffsetRange (Instruction *target)

void	SetImmPCOffsetTarget (Instruction *target)

void	SetImmLLiteral (Instruction *source)

uintptr_t	LiteralAddress ()

Instruction *	InstructionAtOffset (int64_t offset, CheckAlignment check=CHECK_ALIGNMENT)

ptrdiff_t	DistanceTo (Instruction *target)

void	SetPCRelImmTarget (Instruction *target)

void	SetBranchImmTarget (Instruction *target)

Instr	InstructionBits () const

void	SetInstructionBits (Instr value)

int	Bit (int nr) const

int	Bits (int hi, int lo) const

Type	InstructionType () const

Opcode	OpcodeValue () const

int	RsValue () const

int	RtValue () const

int	RdValue () const

int	SaValue () const

int	FunctionValue () const

int	FdValue () const

int	FsValue () const

int	FtValue () const

int	FrValue () const

int	FCccValue () const

int	FBccValue () const

int	FBtrueValue () const

Opcode	OpcodeFieldRaw () const

int	RsFieldRaw () const

int	RsFieldRawNoAssert () const

int	RtFieldRaw () const

int	RdFieldRaw () const

int	SaFieldRaw () const

int	FunctionFieldRaw () const

int	SecondaryValue () const

int32_t	Imm16Value () const

int32_t	Imm21Value () const

int32_t	Imm26Value () const

bool	IsForbiddenInBranchDelay () const

bool	IsLinkingInstruction () const

bool	IsTrap () const

Instr	InstructionBits () const

void	SetInstructionBits (Instr value)

int	Bit (int nr) const

int	Bits (int hi, int lo) const

Type	InstructionType () const

Opcode	OpcodeValue () const

int	RsValue () const

int	RtValue () const

int	RdValue () const

int	SaValue () const

int	FunctionValue () const

int	FdValue () const

int	FsValue () const

int	FtValue () const

int	FrValue () const

int	FCccValue () const

int	FBccValue () const

int	FBtrueValue () const

Opcode	OpcodeFieldRaw () const

int	RsFieldRaw () const

int	RsFieldRawNoAssert () const

int	RtFieldRaw () const

int	RdFieldRaw () const

int	SaFieldRaw () const

int	FunctionFieldRaw () const

int	SecondaryValue () const

int32_t	Imm16Value () const

int32_t	Imm21Value () const

int32_t	Imm26Value () const

bool	IsForbiddenInBranchDelay () const

bool	IsLinkingInstruction () const

bool	IsTrap () const

Static Public Member Functions
static InstructionSequence *	At (Address address)

Static Public Member Functions inherited from v8::internal::Instruction
static int	Bit (Instr instr, int nr)

static int	Bits (Instr instr, int hi, int lo)

static int	BitField (Instr instr, int hi, int lo)

static Instruction *	At (byte *pc)

static int	ImmBranchRangeBitwidth (ImmBranchType branch_type)

static int32_t	ImmBranchRange (ImmBranchType branch_type)

static bool	IsValidImmPCOffset (ImmBranchType branch_type, int32_t offset)

template<typename T >
static Instruction *	Cast (T src)

static bool	IsValidPCRelOffset (int offset)

static Instruction *	At (byte *pc)

static Instruction *	At (byte *pc)

Additional Inherited Members
Public Types inherited from v8::internal::Instruction
enum	{ kInstrSize = 4 , kInstrSizeLog2 = 2 , kPCReadOffset = 8 }

enum	CheckAlignment { NO_CHECK , CHECK_ALIGNMENT }

enum	{ kInstrSize = 4 , kInstrSizeLog2 = 2 , kPCReadOffset = 8 }

enum	Type { kRegisterType , kImmediateType , kJumpType , kUnsupported = -1 , kRegisterType , kImmediateType , kJumpType , kUnsupported = -1 }

enum	{ kInstrSize = 4 , kInstrSizeLog2 = 2 , kPCReadOffset = 8 }

enum	Type { kRegisterType , kImmediateType , kJumpType , kUnsupported = -1 , kRegisterType , kImmediateType , kJumpType , kUnsupported = -1 }

Static Public Attributes inherited from v8::internal::Instruction
static const int	ImmPCRelRangeBitwidth = 21

Detailed Description

Definition at line 392 of file instructions-arm64.h.

Member Function Documentation

◆ At()

static InstructionSequence* v8::internal::InstructionSequence::At ( Address address )

inlinestatic

Definition at line 394 of file instructions-arm64.h.

                                                   {
     return reinterpret_cast<InstructionSequence*>(address);
   }

◆ InlineData()

uint64_t v8::internal::InstructionSequence::InlineData ( ) const

◆ IsInlineData()

bool v8::internal::InstructionSequence::IsInlineData ( ) const

The documentation for this class was generated from the following file:

/mnt/V8SourceCode/src/arm64/instructions-arm64.h

Public Member Functions

Static Public Member Functions

Additional Inherited Members

Detailed Description

Member Function Documentation

◆ At()

◆ InlineData()

◆ IsInlineData()