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v8::internal::Instruction Class Reference

#include <constants-arm.h>

+ Inheritance diagram for v8::internal::Instruction:
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Public Types

enum  { kInstrSize = 4 , kInstrSizeLog2 = 2 , kPCReadOffset = 8 }
 
enum  CheckAlignment { NO_CHECK , CHECK_ALIGNMENT }
 
enum  { kInstrSize = 4 , kInstrSizeLog2 = 2 , kPCReadOffset = 8 }
 
enum  Type {
  kRegisterType , kImmediateType , kJumpType , kUnsupported = -1 ,
  kRegisterType , kImmediateType , kJumpType , kUnsupported = -1
}
 
enum  { kInstrSize = 4 , kInstrSizeLog2 = 2 , kPCReadOffset = 8 }
 
enum  Type {
  kRegisterType , kImmediateType , kJumpType , kUnsupported = -1 ,
  kRegisterType , kImmediateType , kJumpType , kUnsupported = -1
}
 

Public Member Functions

Instr InstructionBits () const
 
void SetInstructionBits (Instr value)
 
int Bit (int nr) const
 
int Bits (int hi, int lo) const
 
int BitField (int hi, int lo) const
 
Condition ConditionValue () const
 
Condition ConditionField () const
 
 DECLARE_STATIC_TYPED_ACCESSOR (Condition, ConditionValue)
 
 DECLARE_STATIC_TYPED_ACCESSOR (Condition, ConditionField)
 
int TypeValue () const
 
int SpecialValue () const
 
int RnValue () const
 
 DECLARE_STATIC_ACCESSOR (RnValue)
 
int RdValue () const
 
 DECLARE_STATIC_ACCESSOR (RdValue)
 
int CoprocessorValue () const
 
int VnValue () const
 
int VmValue () const
 
int VdValue () const
 
int NValue () const
 
int MValue () const
 
int DValue () const
 
int RtValue () const
 
int PValue () const
 
int UValue () const
 
int Opc1Value () const
 
int Opc2Value () const
 
int Opc3Value () const
 
int SzValue () const
 
int VLValue () const
 
int VCValue () const
 
int VAValue () const
 
int VBValue () const
 
int VFPNRegValue (VFPRegPrecision pre)
 
int VFPMRegValue (VFPRegPrecision pre)
 
int VFPDRegValue (VFPRegPrecision pre)
 
int OpcodeValue () const
 
Opcode OpcodeField () const
 
int SValue () const
 
int RmValue () const
 
 DECLARE_STATIC_ACCESSOR (RmValue)
 
int ShiftValue () const
 
ShiftOp ShiftField () const
 
int RegShiftValue () const
 
int RsValue () const
 
int ShiftAmountValue () const
 
int RotateValue () const
 
 DECLARE_STATIC_ACCESSOR (RotateValue)
 
int Immed8Value () const
 
 DECLARE_STATIC_ACCESSOR (Immed8Value)
 
int Immed4Value () const
 
int ImmedMovwMovtValue () const
 
 DECLARE_STATIC_ACCESSOR (ImmedMovwMovtValue)
 
int PUValue () const
 
int PUField () const
 
int BValue () const
 
int WValue () const
 
int LValue () const
 
int Offset12Value () const
 
int RlistValue () const
 
int SignValue () const
 
int HValue () const
 
int ImmedHValue () const
 
int ImmedLValue () const
 
int LinkValue () const
 
int SImmed24Value () const
 
SoftwareInterruptCodes SvcValue () const
 
bool IsSpecialType0 () const
 
bool IsMiscType0 () const
 
bool IsNopType1 () const
 
bool IsStop () const
 
bool HasS () const
 
bool HasB () const
 
bool HasW () const
 
bool HasL () const
 
bool HasU () const
 
bool HasSign () const
 
bool HasH () const
 
bool HasLink () const
 
double DoubleImmedVmov () const
 
Instr InstructionBits () const
 
void SetInstructionBits (Instr new_instr)
 
int Bit (int pos) const
 
uint32_t Bits (int msb, int lsb) const
 
int32_t SignedBits (int msb, int lsb) const
 
Instr Mask (uint32_t mask) const
 
Instruction * following (int count=1)
 
Instruction * preceding (int count=1)
 
int ImmPCRel () const
 
uint64_t ImmLogical ()
 
float ImmFP32 ()
 
double ImmFP64 ()
 
LSDataSize SizeLSPair () const
 
bool IsCondBranchImm () const
 
bool IsUncondBranchImm () const
 
bool IsCompareBranch () const
 
bool IsTestBranch () const
 
bool IsImmBranch () const
 
bool IsLdrLiteral () const
 
bool IsLdrLiteralX () const
 
bool IsPCRelAddressing () const
 
bool IsAdr () const
 
bool IsLogicalImmediate () const
 
bool IsAddSubImmediate () const
 
bool IsAddSubShifted () const
 
bool IsAddSubExtended () const
 
bool IsLoadOrStore () const
 
bool IsLoad () const
 
bool IsStore () const
 
Reg31Mode RdMode () const
 
Reg31Mode RnMode () const
 
ImmBranchType BranchType () const
 
int ImmBranch () const
 
bool IsBranchAndLinkToRegister () const
 
bool IsMovz () const
 
bool IsMovk () const
 
bool IsMovn () const
 
bool IsNop (int n)
 
int64_t ImmPCOffset ()
 
Instruction * ImmPCOffsetTarget ()
 
bool IsTargetInImmPCOffsetRange (Instruction *target)
 
void SetImmPCOffsetTarget (Instruction *target)
 
void SetImmLLiteral (Instruction *source)
 
uintptr_t LiteralAddress ()
 
Instruction * InstructionAtOffset (int64_t offset, CheckAlignment check=CHECK_ALIGNMENT)
 
ptrdiff_t DistanceTo (Instruction *target)
 
void SetPCRelImmTarget (Instruction *target)
 
void SetBranchImmTarget (Instruction *target)
 
Instr InstructionBits () const
 
void SetInstructionBits (Instr value)
 
int Bit (int nr) const
 
int Bits (int hi, int lo) const
 
Type InstructionType () const
 
Opcode OpcodeValue () const
 
int RsValue () const
 
int RtValue () const
 
int RdValue () const
 
int SaValue () const
 
int FunctionValue () const
 
int FdValue () const
 
int FsValue () const
 
int FtValue () const
 
int FrValue () const
 
int FCccValue () const
 
int FBccValue () const
 
int FBtrueValue () const
 
Opcode OpcodeFieldRaw () const
 
int RsFieldRaw () const
 
int RsFieldRawNoAssert () const
 
int RtFieldRaw () const
 
int RdFieldRaw () const
 
int SaFieldRaw () const
 
int FunctionFieldRaw () const
 
int SecondaryValue () const
 
int32_t Imm16Value () const
 
int32_t Imm21Value () const
 
int32_t Imm26Value () const
 
bool IsForbiddenInBranchDelay () const
 
bool IsLinkingInstruction () const
 
bool IsTrap () const
 
Instr InstructionBits () const
 
void SetInstructionBits (Instr value)
 
int Bit (int nr) const
 
int Bits (int hi, int lo) const
 
Type InstructionType () const
 
Opcode OpcodeValue () const
 
int RsValue () const
 
int RtValue () const
 
int RdValue () const
 
int SaValue () const
 
int FunctionValue () const
 
int FdValue () const
 
int FsValue () const
 
int FtValue () const
 
int FrValue () const
 
int FCccValue () const
 
int FBccValue () const
 
int FBtrueValue () const
 
Opcode OpcodeFieldRaw () const
 
int RsFieldRaw () const
 
int RsFieldRawNoAssert () const
 
int RtFieldRaw () const
 
int RdFieldRaw () const
 
int SaFieldRaw () const
 
int FunctionFieldRaw () const
 
int SecondaryValue () const
 
int32_t Imm16Value () const
 
int32_t Imm21Value () const
 
int32_t Imm26Value () const
 
bool IsForbiddenInBranchDelay () const
 
bool IsLinkingInstruction () const
 
bool IsTrap () const
 

Static Public Member Functions

static int Bit (Instr instr, int nr)
 
static int Bits (Instr instr, int hi, int lo)
 
static int BitField (Instr instr, int hi, int lo)
 
static Instruction * At (byte *pc)
 
static int ImmBranchRangeBitwidth (ImmBranchType branch_type)
 
static int32_t ImmBranchRange (ImmBranchType branch_type)
 
static bool IsValidImmPCOffset (ImmBranchType branch_type, int32_t offset)
 
template<typename T >
static Instruction * Cast (T src)
 
static bool IsValidPCRelOffset (int offset)
 
static Instruction * At (byte *pc)
 
static Instruction * At (byte *pc)
 

Static Public Attributes

static const int ImmPCRelRangeBitwidth = 21
 

Private Member Functions

int VFPGlueRegValue (VFPRegPrecision pre, int four_bit, int one_bit)
 
 DISALLOW_IMPLICIT_CONSTRUCTORS (Instruction)
 
 DISALLOW_IMPLICIT_CONSTRUCTORS (Instruction)
 
 DISALLOW_IMPLICIT_CONSTRUCTORS (Instruction)
 

Detailed Description

Definition at line 424 of file constants-arm.h.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum
Enumerator
kInstrSize 
kInstrSizeLog2 
kPCReadOffset 

Definition at line 426 of file constants-arm.h.

426  {
427  kInstrSize = 4,
428  kInstrSizeLog2 = 2,
429  kPCReadOffset = 8
430  };

◆ anonymous enum

anonymous enum
Enumerator
kInstrSize 
kInstrSizeLog2 
kPCReadOffset 

Definition at line 731 of file constants-mips.h.

731  {
732  kInstrSize = 4,
733  kInstrSizeLog2 = 2,
734  // On MIPS PC cannot actually be directly accessed. We behave as if PC was
735  // always the value of the current instruction being executed.
736  kPCReadOffset = 0
737  };

◆ anonymous enum

anonymous enum
Enumerator
kInstrSize 
kInstrSizeLog2 
kPCReadOffset 

Definition at line 745 of file constants-mips64.h.

745  {
746  kInstrSize = 4,
747  kInstrSizeLog2 = 2,
748  // On MIPS PC cannot actually be directly accessed. We behave as if PC was
749  // always the value of the current instruction being executed.
750  kPCReadOffset = 0
751  };

◆ CheckAlignment

enum v8::internal::Instruction::CheckAlignment
Enumerator
NO_CHECK 
CHECK_ALIGNMENT 

Definition at line 360 of file instructions-arm64.h.

360 { NO_CHECK, CHECK_ALIGNMENT };

◆ Type [1/2]

enum v8::internal::Instruction::Type
Enumerator
kRegisterType 
kImmediateType 
kJumpType 
kUnsupported 
kRegisterType 
kImmediateType 
kJumpType 
kUnsupported 

Definition at line 760 of file constants-mips.h.

760  {
761  kRegisterType,
762  kImmediateType,
763  kJumpType,
764  kUnsupported = -1
765  };

◆ Type [2/2]

enum v8::internal::Instruction::Type
Enumerator
kRegisterType 
kImmediateType 
kJumpType 
kUnsupported 
kRegisterType 
kImmediateType 
kJumpType 
kUnsupported 

Definition at line 774 of file constants-mips64.h.

774  {
775  kRegisterType,
776  kImmediateType,
777  kJumpType,
778  kUnsupported = -1
779  };

Member Function Documentation

◆ At() [1/3]

static Instruction* v8::internal::Instruction::At ( byte *  pc)
inlinestatic

Definition at line 636 of file constants-arm.h.

636  {
637  return reinterpret_cast<Instruction*>(pc);
638  }
v8::internal::pc
const Register pc
Definition: assembler-arm.h:177

References v8::internal::pc.

Referenced by v8::internal::Assembler::target_address_at().

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◆ At() [2/3]

static Instruction* v8::internal::Instruction::At ( byte *  pc)
inlinestatic

Definition at line 914 of file constants-mips.h.

914  {
915  return reinterpret_cast<Instruction*>(pc);
916  }

References v8::internal::pc.

◆ At() [3/3]

static Instruction* v8::internal::Instruction::At ( byte *  pc)
inlinestatic

Definition at line 928 of file constants-mips64.h.

928  {
929  return reinterpret_cast<Instruction*>(pc);
930  }

References v8::internal::pc.

◆ Bit() [1/5]

static int v8::internal::Instruction::Bit ( Instr  instr,
int  nr 
)
inlinestatic

Definition at line 470 of file constants-arm.h.

470  {
471  return (instr >> nr) & 1;
472  }

◆ Bit() [2/5]

int v8::internal::Instruction::Bit ( int  nr) const
inline

Definition at line 453 of file constants-arm.h.

453  {
454  return (InstructionBits() >> nr) & 1;
455  }
v8::internal::Instruction::InstructionBits
Instr InstructionBits() const
Definition: constants-arm.h:443

References InstructionBits().

Referenced by BValue(), v8::internal::Decoder< V >::DecodeAddSubImmediate(), v8::internal::Decoder< V >::DecodeBitfieldExtract(), v8::internal::Decoder< V >::DecodeBranchSystemException(), v8::internal::Decoder< V >::DecodeDataProcessing(), v8::internal::Decoder< V >::DecodeFP(), v8::internal::Decoder< V >::DecodeLoadStore(), v8::internal::Decoder< V >::DecodeLogical(), v8::internal::Decoder< V >::DecodePCRelAddressing(), DValue(), HValue(), IsMiscType0(), IsSpecialType0(), IsStop(), LinkValue(), LValue(), MValue(), NValue(), Opc1Value(), PValue(), RegShiftValue(), SignValue(), SValue(), SzValue(), UValue(), VCValue(), VFPGlueRegValue(), VLValue(), and WValue().

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◆ Bit() [3/5]

int v8::internal::Instruction::Bit ( int  nr) const
inline

Definition at line 750 of file constants-mips.h.

750  {
751  return (InstructionBits() >> nr) & 1;
752  }

References InstructionBits().

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◆ Bit() [4/5]

int v8::internal::Instruction::Bit ( int  nr) const
inline

Definition at line 764 of file constants-mips64.h.

764  {
765  return (InstructionBits() >> nr) & 1;
766  }

References InstructionBits().

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◆ Bit() [5/5]

int v8::internal::Instruction::Bit ( int  pos) const
inline

Definition at line 107 of file instructions-arm64.h.

107  {
108  return (InstructionBits() >> pos) & 1;
109  }

References InstructionBits().

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◆ BitField() [1/2]

static int v8::internal::Instruction::BitField ( Instr  instr,
int  hi,
int  lo 
)
inlinestatic

Definition at line 481 of file constants-arm.h.

481  {
482  return instr & (((2 << (hi - lo)) - 1) << lo);
483  }

References v8::internal::hi, and v8::internal::lo.

◆ BitField() [2/2]

int v8::internal::Instruction::BitField ( int  hi,
int  lo 
) const
inline

Definition at line 463 of file constants-arm.h.

463  {
464  return InstructionBits() & (((2 << (hi - lo)) - 1) << lo);
465  }

References v8::internal::hi, InstructionBits(), and v8::internal::lo.

Referenced by ConditionField(), OpcodeField(), PUField(), and ShiftField().

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◆ Bits() [1/5]

static int v8::internal::Instruction::Bits ( Instr  instr,
int  hi,
int  lo 
)
inlinestatic

Definition at line 475 of file constants-arm.h.

475  {
476  return (instr >> lo) & ((2 << (hi - lo)) - 1);
477  }

References v8::internal::hi, and v8::internal::lo.

◆ Bits() [2/5]

int v8::internal::Instruction::Bits ( int  hi,
int  lo 
) const
inline

Definition at line 458 of file constants-arm.h.

458  {
459  return (InstructionBits() >> lo) & ((2 << (hi - lo)) - 1);
460  }

References v8::internal::hi, InstructionBits(), and v8::internal::lo.

Referenced by ConditionValue(), CoprocessorValue(), v8::internal::Decoder< V >::Decode(), v8::internal::Decoder< V >::DecodeAddSubImmediate(), v8::internal::Decoder< V >::DecodeAdvSIMDDataProcessing(), v8::internal::Decoder< V >::DecodeAdvSIMDLoadStore(), v8::internal::Decoder< V >::DecodeBitfieldExtract(), v8::internal::Decoder< V >::DecodeBranchSystemException(), v8::internal::Decoder< V >::DecodeDataProcessing(), v8::internal::Decoder< V >::DecodeFP(), v8::internal::Decoder< V >::DecodeLoadStore(), v8::internal::Decoder< V >::DecodeLogical(), v8::internal::Decoder< V >::DecodePCRelAddressing(), FBccValue(), FBtrueValue(), FCccValue(), FdValue(), FrValue(), FsValue(), FtValue(), FunctionValue(), Imm16Value(), Imm21Value(), Imm26Value(), Immed4Value(), Immed8Value(), ImmedHValue(), ImmedLValue(), IsNopType1(), Offset12Value(), Opc1Value(), Opc2Value(), Opc3Value(), OpcodeValue(), PUValue(), RdValue(), RlistValue(), RmValue(), RnValue(), RotateValue(), RsValue(), RtValue(), SaValue(), ShiftAmountValue(), ShiftValue(), SpecialValue(), SvcValue(), TypeValue(), VAValue(), VBValue(), VdValue(), VFPGlueRegValue(), VmValue(), and VnValue().

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◆ Bits() [3/5]

int v8::internal::Instruction::Bits ( int  hi,
int  lo 
) const
inline

Definition at line 755 of file constants-mips.h.

755  {
756  return (InstructionBits() >> lo) & ((2 << (hi - lo)) - 1);
757  }

References v8::internal::hi, InstructionBits(), and v8::internal::lo.

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◆ Bits() [4/5]

int v8::internal::Instruction::Bits ( int  hi,
int  lo 
) const
inline

Definition at line 769 of file constants-mips64.h.

769  {
770  return (InstructionBits() >> lo) & ((2 << (hi - lo)) - 1);
771  }

References v8::internal::hi, InstructionBits(), and v8::internal::lo.

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◆ Bits() [5/5]

uint32_t v8::internal::Instruction::Bits ( int  msb,
int  lsb 
) const
inline

Definition at line 111 of file instructions-arm64.h.

111  {
112  return unsigned_bitextract_32(msb, lsb, InstructionBits());
113  }
v8::internal::unsigned_bitextract_32
uint32_t unsigned_bitextract_32(int msb, int lsb, uint32_t x)
Definition: utils.h:880

References InstructionBits(), and v8::internal::unsigned_bitextract_32().

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◆ BranchType()

ImmBranchType v8::internal::Instruction::BranchType ( ) const
inline

Definition at line 261 of file instructions-arm64.h.

261  {
262  if (IsCondBranchImm()) {
263  return CondBranchType;
264  } else if (IsUncondBranchImm()) {
265  return UncondBranchType;
266  } else if (IsCompareBranch()) {
267  return CompareBranchType;
268  } else if (IsTestBranch()) {
269  return TestBranchType;
270  } else {
271  return UnknownBranchType;
272  }
273  }

References v8::internal::CompareBranchType, v8::internal::CondBranchType, IsCompareBranch(), IsCondBranchImm(), IsTestBranch(), IsUncondBranchImm(), v8::internal::TestBranchType, v8::internal::UncondBranchType, and v8::internal::UnknownBranchType.

Referenced by ImmBranch(), and IsImmBranch().

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◆ BValue()

int v8::internal::Instruction::BValue ( ) const
inline

Definition at line 578 of file constants-arm.h.

578 { return Bit(22); }
v8::internal::Instruction::Bit
int Bit(int nr) const
Definition: constants-arm.h:453

References Bit().

Referenced by HasB().

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◆ Cast()

template<typename T >
static Instruction* v8::internal::Instruction::Cast ( T  src)
inlinestatic

Definition at line 371 of file instructions-arm64.h.

371  {
372  return reinterpret_cast<Instruction*>(src);
373  }

Referenced by InstructionAtOffset(), and v8::internal::Assembler::pc().

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◆ ConditionField()

Condition v8::internal::Instruction::ConditionField ( ) const
inline

Definition at line 503 of file constants-arm.h.

503  {
504  return static_cast<Condition>(BitField(31, 28));
505  }
v8::internal::Instruction::BitField
int BitField(int hi, int lo) const
Definition: constants-arm.h:463

References BitField().

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◆ ConditionValue()

Condition v8::internal::Instruction::ConditionValue ( ) const
inline

Definition at line 500 of file constants-arm.h.

500  {
501  return static_cast<Condition>(Bits(31, 28));
502  }
v8::internal::Instruction::Bits
int Bits(int hi, int lo) const
Definition: constants-arm.h:458

References Bits().

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◆ CoprocessorValue()

int v8::internal::Instruction::CoprocessorValue ( ) const
inline

Definition at line 517 of file constants-arm.h.

517 { return Bits(11, 8); }

References Bits().

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◆ DECLARE_STATIC_ACCESSOR() [1/6]

v8::internal::Instruction::DECLARE_STATIC_ACCESSOR ( Immed8Value  )

◆ DECLARE_STATIC_ACCESSOR() [2/6]

v8::internal::Instruction::DECLARE_STATIC_ACCESSOR ( ImmedMovwMovtValue  )

◆ DECLARE_STATIC_ACCESSOR() [3/6]

v8::internal::Instruction::DECLARE_STATIC_ACCESSOR ( RdValue  )

◆ DECLARE_STATIC_ACCESSOR() [4/6]

v8::internal::Instruction::DECLARE_STATIC_ACCESSOR ( RmValue  )

◆ DECLARE_STATIC_ACCESSOR() [5/6]

v8::internal::Instruction::DECLARE_STATIC_ACCESSOR ( RnValue  )

◆ DECLARE_STATIC_ACCESSOR() [6/6]

v8::internal::Instruction::DECLARE_STATIC_ACCESSOR ( RotateValue  )

◆ DECLARE_STATIC_TYPED_ACCESSOR() [1/2]

v8::internal::Instruction::DECLARE_STATIC_TYPED_ACCESSOR ( Condition  ,
ConditionField   
)

◆ DECLARE_STATIC_TYPED_ACCESSOR() [2/2]

v8::internal::Instruction::DECLARE_STATIC_TYPED_ACCESSOR ( Condition  ,
ConditionValue   
)

◆ DISALLOW_IMPLICIT_CONSTRUCTORS() [1/3]

v8::internal::Instruction::DISALLOW_IMPLICIT_CONSTRUCTORS ( Instruction  )
private

◆ DISALLOW_IMPLICIT_CONSTRUCTORS() [2/3]

v8::internal::Instruction::DISALLOW_IMPLICIT_CONSTRUCTORS ( Instruction  )
private

◆ DISALLOW_IMPLICIT_CONSTRUCTORS() [3/3]

v8::internal::Instruction::DISALLOW_IMPLICIT_CONSTRUCTORS ( Instruction  )
private

◆ DistanceTo()

ptrdiff_t v8::internal::Instruction::DistanceTo ( Instruction *  target)
inline

Definition at line 375 of file instructions-arm64.h.

375  {
376  return reinterpret_cast<Address>(target) - reinterpret_cast<Address>(this);
377  }
v8::internal::Address
byte * Address
Definition: globals.h:101

◆ DoubleImmedVmov()

double v8::internal::Instruction::DoubleImmedVmov ( ) const

◆ DValue()

int v8::internal::Instruction::DValue ( ) const
inline

Definition at line 525 of file constants-arm.h.

525 { return Bit(22); }

References Bit().

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◆ FBccValue() [1/2]

int v8::internal::Instruction::FBccValue ( ) const
inline

Definition at line 827 of file constants-mips.h.

827  {
828  return Bits(kFBccShift + kFBccBits - 1, kFBccShift);
829  }
v8::internal::kFBccBits
const int kFBccBits
Definition: constants-mips.h:289
v8::internal::kFBccShift
const int kFBccShift
Definition: constants-mips.h:288

References Bits(), v8::internal::kFBccBits, and v8::internal::kFBccShift.

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◆ FBccValue() [2/2]

int v8::internal::Instruction::FBccValue ( ) const
inline

Definition at line 841 of file constants-mips64.h.

841  {
842  return Bits(kFBccShift + kFBccBits - 1, kFBccShift);
843  }

References Bits(), v8::internal::kFBccBits, and v8::internal::kFBccShift.

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◆ FBtrueValue() [1/2]

int v8::internal::Instruction::FBtrueValue ( ) const
inline

Definition at line 832 of file constants-mips.h.

832  {
833  return Bits(kFBtrueShift + kFBtrueBits - 1, kFBtrueShift);
834  }
v8::internal::kFBtrueShift
const int kFBtrueShift
Definition: constants-mips.h:290
v8::internal::kFBtrueBits
const int kFBtrueBits
Definition: constants-mips.h:291

References Bits(), v8::internal::kFBtrueBits, and v8::internal::kFBtrueShift.

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◆ FBtrueValue() [2/2]

int v8::internal::Instruction::FBtrueValue ( ) const
inline

Definition at line 846 of file constants-mips64.h.

846  {
847  return Bits(kFBtrueShift + kFBtrueBits - 1, kFBtrueShift);
848  }

References Bits(), v8::internal::kFBtrueBits, and v8::internal::kFBtrueShift.

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◆ FCccValue() [1/2]

int v8::internal::Instruction::FCccValue ( ) const
inline

Definition at line 822 of file constants-mips.h.

822  {
823  return Bits(kFCccShift + kFCccBits - 1, kFCccShift);
824  }
v8::internal::kFCccBits
const int kFCccBits
Definition: constants-mips.h:287
v8::internal::kFCccShift
const int kFCccShift
Definition: constants-mips.h:286

References Bits(), v8::internal::kFCccBits, and v8::internal::kFCccShift.

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◆ FCccValue() [2/2]

int v8::internal::Instruction::FCccValue ( ) const
inline

Definition at line 836 of file constants-mips64.h.

836  {
837  return Bits(kFCccShift + kFCccBits - 1, kFCccShift);
838  }

References Bits(), v8::internal::kFCccBits, and v8::internal::kFCccShift.

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◆ FdValue() [1/2]

int v8::internal::Instruction::FdValue ( ) const
inline

Definition at line 805 of file constants-mips.h.

805  {
806  return Bits(kFdShift + kFdBits - 1, kFdShift);
807  }
v8::internal::kFdBits
const int kFdBits
Definition: constants-mips.h:285
v8::internal::kFdShift
const int kFdShift
Definition: constants-mips.h:284

References Bits(), v8::internal::kFdBits, and v8::internal::kFdShift.

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◆ FdValue() [2/2]

int v8::internal::Instruction::FdValue ( ) const
inline

Definition at line 819 of file constants-mips64.h.

819  {
820  return Bits(kFdShift + kFdBits - 1, kFdShift);
821  }

References Bits(), v8::internal::kFdBits, and v8::internal::kFdShift.

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◆ following()

Instruction* v8::internal::Instruction::following ( int  count = 1)
inline

Definition at line 124 of file instructions-arm64.h.

124  {
125  return InstructionAtOffset(count * static_cast<int>(kInstructionSize));
126  }
v8::internal::Instruction::InstructionAtOffset
Instruction * InstructionAtOffset(int64_t offset, CheckAlignment check=CHECK_ALIGNMENT)
Definition: instructions-arm64.h:362
v8::internal::kInstructionSize
const unsigned kInstructionSize
Definition: constants-arm64.h:28

References InstructionAtOffset(), and v8::internal::kInstructionSize.

Referenced by v8::internal::RecordWriteStub::GetMode(), and preceding().

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◆ FrValue() [1/2]

int v8::internal::Instruction::FrValue ( ) const
inline

Definition at line 817 of file constants-mips.h.

817  {
818  return Bits(kFrShift + kFrBits -1, kFrShift);
819  }
v8::internal::kFrBits
const int kFrBits
Definition: constants-mips.h:278
v8::internal::kFrShift
const int kFrShift
Definition: constants-mips.h:279

References Bits(), v8::internal::kFrBits, and v8::internal::kFrShift.

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◆ FrValue() [2/2]

int v8::internal::Instruction::FrValue ( ) const
inline

Definition at line 831 of file constants-mips64.h.

831  {
832  return Bits(kFrShift + kFrBits -1, kFrShift);
833  }

References Bits(), v8::internal::kFrBits, and v8::internal::kFrShift.

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◆ FsValue() [1/2]

int v8::internal::Instruction::FsValue ( ) const
inline

Definition at line 809 of file constants-mips.h.

809  {
810  return Bits(kFsShift + kFsBits - 1, kFsShift);
811  }
v8::internal::kFsShift
const int kFsShift
Definition: constants-mips.h:280
v8::internal::kFsBits
const int kFsBits
Definition: constants-mips.h:281

References Bits(), v8::internal::kFsBits, and v8::internal::kFsShift.

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◆ FsValue() [2/2]

int v8::internal::Instruction::FsValue ( ) const
inline

Definition at line 823 of file constants-mips64.h.

823  {
824  return Bits(kFsShift + kFsBits - 1, kFsShift);
825  }

References Bits(), v8::internal::kFsBits, and v8::internal::kFsShift.

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◆ FtValue() [1/2]

int v8::internal::Instruction::FtValue ( ) const
inline

Definition at line 813 of file constants-mips.h.

813  {
814  return Bits(kFtShift + kFtBits - 1, kFtShift);
815  }
v8::internal::kFtBits
const int kFtBits
Definition: constants-mips.h:283
v8::internal::kFtShift
const int kFtShift
Definition: constants-mips.h:282

References Bits(), v8::internal::kFtBits, and v8::internal::kFtShift.

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◆ FtValue() [2/2]

int v8::internal::Instruction::FtValue ( ) const
inline

Definition at line 827 of file constants-mips64.h.

827  {
828  return Bits(kFtShift + kFtBits - 1, kFtShift);
829  }

References Bits(), v8::internal::kFtBits, and v8::internal::kFtShift.

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◆ FunctionFieldRaw() [1/2]

int v8::internal::Instruction::FunctionFieldRaw ( ) const
inline

Definition at line 868 of file constants-mips.h.

868  {
869  return InstructionBits() & kFunctionFieldMask;
870  }
v8::internal::kFunctionFieldMask
const int kFunctionFieldMask
Definition: constants-mips.h:303

References InstructionBits(), and v8::internal::kFunctionFieldMask.

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◆ FunctionFieldRaw() [2/2]

int v8::internal::Instruction::FunctionFieldRaw ( ) const
inline

Definition at line 882 of file constants-mips64.h.

882  {
883  return InstructionBits() & kFunctionFieldMask;
884  }

References InstructionBits(), and v8::internal::kFunctionFieldMask.

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◆ FunctionValue() [1/2]

int v8::internal::Instruction::FunctionValue ( ) const
inline

Definition at line 799 of file constants-mips.h.

799  {
800  DCHECK(InstructionType() == kRegisterType ||
801  InstructionType() == kImmediateType);
802  return Bits(kFunctionShift + kFunctionBits - 1, kFunctionShift);
803  }
v8::internal::Instruction::InstructionType
Type InstructionType() const
DCHECK
#define DCHECK(condition)
Definition: logging.h:205
v8::internal::kFunctionShift
const int kFunctionShift
Definition: constants-mips.h:259
v8::internal::kFunctionBits
const int kFunctionBits
Definition: constants-mips.h:260

References Bits(), DCHECK, InstructionType(), v8::internal::kFunctionBits, v8::internal::kFunctionShift, kImmediateType, and kRegisterType.

Referenced by SecondaryValue().

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◆ FunctionValue() [2/2]

int v8::internal::Instruction::FunctionValue ( ) const
inline

Definition at line 813 of file constants-mips64.h.

813  {
814  DCHECK(InstructionType() == kRegisterType ||
815  InstructionType() == kImmediateType);
816  return Bits(kFunctionShift + kFunctionBits - 1, kFunctionShift);
817  }

References Bits(), DCHECK, InstructionType(), v8::internal::kFunctionBits, v8::internal::kFunctionShift, kImmediateType, and kRegisterType.

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◆ HasB()

bool v8::internal::Instruction::HasB ( ) const
inline

Definition at line 621 of file constants-arm.h.

621 { return BValue() == 1; }

References BValue().

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◆ HasH()

bool v8::internal::Instruction::HasH ( ) const
inline

Definition at line 626 of file constants-arm.h.

626 { return HValue() == 1; }

References HValue().

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◆ HasL()

bool v8::internal::Instruction::HasL ( ) const
inline

Definition at line 623 of file constants-arm.h.

623 { return LValue() == 1; }

References LValue().

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◆ HasLink()

bool v8::internal::Instruction::HasLink ( ) const
inline

Definition at line 627 of file constants-arm.h.

627 { return LinkValue() == 1; }

References LinkValue().

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◆ HasS()

bool v8::internal::Instruction::HasS ( ) const
inline

Definition at line 620 of file constants-arm.h.

620 { return SValue() == 1; }

References SValue().

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◆ HasSign()

bool v8::internal::Instruction::HasSign ( ) const
inline

Definition at line 625 of file constants-arm.h.

625 { return SignValue() == 1; }

References SignValue().

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◆ HasU()

bool v8::internal::Instruction::HasU ( ) const
inline

Definition at line 624 of file constants-arm.h.

624 { return UValue() == 1; }

References UValue().

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◆ HasW()

bool v8::internal::Instruction::HasW ( ) const
inline

Definition at line 622 of file constants-arm.h.

622 { return WValue() == 1; }

References WValue().

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◆ HValue()

int v8::internal::Instruction::HValue ( ) const
inline

Definition at line 588 of file constants-arm.h.

588 { return Bit(5); }

References Bit().

Referenced by HasH().

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◆ Imm16Value() [1/2]

int32_t v8::internal::Instruction::Imm16Value ( ) const
inline

Definition at line 888 of file constants-mips.h.

888  {
889  DCHECK(InstructionType() == kImmediateType);
890  return Bits(kImm16Shift + kImm16Bits - 1, kImm16Shift);
891  }
v8::internal::kImm16Bits
const int kImm16Bits
Definition: constants-mips.h:264
v8::internal::kImm16Shift
const int kImm16Shift
Definition: constants-mips.h:263

References Bits(), DCHECK, InstructionType(), v8::internal::kImm16Bits, v8::internal::kImm16Shift, and kImmediateType.

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◆ Imm16Value() [2/2]

int32_t v8::internal::Instruction::Imm16Value ( ) const
inline

Definition at line 902 of file constants-mips64.h.

902  {
903  DCHECK(InstructionType() == kImmediateType);
904  return Bits(kImm16Shift + kImm16Bits - 1, kImm16Shift);
905  }

References Bits(), DCHECK, InstructionType(), v8::internal::kImm16Bits, v8::internal::kImm16Shift, and kImmediateType.

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◆ Imm21Value() [1/2]

int32_t v8::internal::Instruction::Imm21Value ( ) const
inline

Definition at line 893 of file constants-mips.h.

893  {
894  DCHECK(InstructionType() == kImmediateType);
895  return Bits(kImm21Shift + kImm21Bits - 1, kImm21Shift);
896  }
v8::internal::kImm21Bits
const int kImm21Bits
Definition: constants-mips.h:266
v8::internal::kImm21Shift
const int kImm21Shift
Definition: constants-mips.h:265

References Bits(), DCHECK, InstructionType(), v8::internal::kImm21Bits, v8::internal::kImm21Shift, and kImmediateType.

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◆ Imm21Value() [2/2]

int32_t v8::internal::Instruction::Imm21Value ( ) const
inline

Definition at line 907 of file constants-mips64.h.

907  {
908  DCHECK(InstructionType() == kImmediateType);
909  return Bits(kImm21Shift + kImm21Bits - 1, kImm21Shift);
910  }

References Bits(), DCHECK, InstructionType(), v8::internal::kImm21Bits, v8::internal::kImm21Shift, and kImmediateType.

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◆ Imm26Value() [1/2]

int32_t v8::internal::Instruction::Imm26Value ( ) const
inline

Definition at line 898 of file constants-mips.h.

898  {
899  DCHECK(InstructionType() == kJumpType);
900  return Bits(kImm26Shift + kImm26Bits - 1, kImm26Shift);
901  }
v8::internal::kImm26Shift
const int kImm26Shift
Definition: constants-mips.h:267
v8::internal::kImm26Bits
const int kImm26Bits
Definition: constants-mips.h:268

References Bits(), DCHECK, InstructionType(), v8::internal::kImm26Bits, v8::internal::kImm26Shift, and kJumpType.

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◆ Imm26Value() [2/2]

int32_t v8::internal::Instruction::Imm26Value ( ) const
inline

Definition at line 912 of file constants-mips64.h.

912  {
913  DCHECK(InstructionType() == kJumpType);
914  return Bits(kImm26Shift + kImm26Bits - 1, kImm26Shift);
915  }

References Bits(), DCHECK, InstructionType(), v8::internal::kImm26Bits, v8::internal::kImm26Shift, and kJumpType.

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◆ ImmBranch()

int v8::internal::Instruction::ImmBranch ( ) const
inline

Definition at line 298 of file instructions-arm64.h.

298  {
299  switch (BranchType()) {
300  case CondBranchType: return ImmCondBranch();
301  case UncondBranchType: return ImmUncondBranch();
302  case CompareBranchType: return ImmCmpBranch();
303  case TestBranchType: return ImmTestBranch();
304  default: UNREACHABLE();
305  }
306  return 0;
307  }
v8::internal::Instruction::BranchType
ImmBranchType BranchType() const
Definition: instructions-arm64.h:261
UNREACHABLE
#define UNREACHABLE()
Definition: logging.h:30

References BranchType(), v8::internal::CompareBranchType, v8::internal::CondBranchType, v8::internal::TestBranchType, v8::internal::UncondBranchType, and UNREACHABLE.

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◆ ImmBranchRange()

static int32_t v8::internal::Instruction::ImmBranchRange ( ImmBranchType  branch_type)
inlinestatic

Definition at line 292 of file instructions-arm64.h.

292  {
293  return
294  (1 << (ImmBranchRangeBitwidth(branch_type) + kInstructionSizeLog2)) / 2 -
295  kInstructionSize;
296  }
v8::internal::Instruction::ImmBranchRangeBitwidth
static int ImmBranchRangeBitwidth(ImmBranchType branch_type)
Definition: instructions-arm64.h:275
v8::internal::kInstructionSizeLog2
const unsigned kInstructionSizeLog2
Definition: constants-arm64.h:29

References ImmBranchRangeBitwidth(), v8::internal::kInstructionSize, and v8::internal::kInstructionSizeLog2.

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◆ ImmBranchRangeBitwidth()

static int v8::internal::Instruction::ImmBranchRangeBitwidth ( ImmBranchType  branch_type)
inlinestatic

Definition at line 275 of file instructions-arm64.h.

275  {
276  switch (branch_type) {
277  case UncondBranchType:
278  return ImmUncondBranch_width;
279  case CondBranchType:
280  return ImmCondBranch_width;
281  case CompareBranchType:
282  return ImmCmpBranch_width;
283  case TestBranchType:
284  return ImmTestBranch_width;
285  default:
286  UNREACHABLE();
287  return 0;
288  }
289  }

References v8::internal::CompareBranchType, v8::internal::CondBranchType, v8::internal::TestBranchType, v8::internal::UncondBranchType, and UNREACHABLE.

Referenced by ImmBranchRange().

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◆ Immed4Value()

int v8::internal::Instruction::Immed4Value ( ) const
inline

Definition at line 570 of file constants-arm.h.

570 { return Bits(19, 16); }

References Bits().

Referenced by ImmedMovwMovtValue().

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◆ Immed8Value()

int v8::internal::Instruction::Immed8Value ( ) const
inline

Definition at line 568 of file constants-arm.h.

568 { return Bits(7, 0); }

References Bits().

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◆ ImmedHValue()

int v8::internal::Instruction::ImmedHValue ( ) const
inline

Definition at line 589 of file constants-arm.h.

589 { return Bits(11, 8); }

References Bits().

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◆ ImmedLValue()

int v8::internal::Instruction::ImmedLValue ( ) const
inline

Definition at line 590 of file constants-arm.h.

590 { return Bits(3, 0); }

References Bits().

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◆ ImmedMovwMovtValue()

int v8::internal::Instruction::ImmedMovwMovtValue ( ) const
inline

Definition at line 571 of file constants-arm.h.

571  {
572  return Immed4Value() << 12 | Offset12Value(); }

References Immed4Value(), and Offset12Value().

Referenced by v8::internal::Assembler::target_address_at().

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◆ ImmFP32()

float v8::internal::Instruction::ImmFP32 ( )

◆ ImmFP64()

double v8::internal::Instruction::ImmFP64 ( )

◆ ImmLogical()

uint64_t v8::internal::Instruction::ImmLogical ( )

◆ ImmPCOffset()

int64_t v8::internal::Instruction::ImmPCOffset ( )

Referenced by v8::internal::RecordWriteStub::Patch().

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◆ ImmPCOffsetTarget()

Instruction* v8::internal::Instruction::ImmPCOffsetTarget ( )

Referenced by v8::internal::Assembler::target_pointer_address_at().

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◆ ImmPCRel()

int v8::internal::Instruction::ImmPCRel ( ) const
inline

Definition at line 139 of file instructions-arm64.h.

139  {
140  DCHECK(IsPCRelAddressing());
141  int const offset = ((ImmPCRelHi() << ImmPCRelLo_width) | ImmPCRelLo());
142  int const width = ImmPCRelLo_width + ImmPCRelHi_width;
143  return signed_bitextract_32(width - 1, 0, offset);
144  }
v8::internal::signed_bitextract_32
int32_t signed_bitextract_32(int msb, int lsb, int32_t x)
Definition: utils.h:888

References DCHECK, IsPCRelAddressing(), and v8::internal::signed_bitextract_32().

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◆ InstructionAtOffset()

Instruction* v8::internal::Instruction::InstructionAtOffset ( int64_t  offset,
CheckAlignment  check = CHECK_ALIGNMENT 
)
inline

Definition at line 362 of file instructions-arm64.h.

364  {
365  Address addr = reinterpret_cast<Address>(this) + offset;
366  // The FUZZ_disasm test relies on no check being done.
367  DCHECK(check == NO_CHECK || IsAddressAligned(addr, kInstructionSize));
368  return Cast(addr);
369  }
v8::internal::Instruction::Cast
static Instruction * Cast(T src)
Definition: instructions-arm64.h:371
v8::internal::IsAddressAligned
bool IsAddressAligned(Address addr, intptr_t alignment, int offset=0)
Definition: utils.h:129

References Cast(), DCHECK, v8::internal::IsAddressAligned(), v8::internal::kInstructionSize, and NO_CHECK.

Referenced by following().

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◆ InstructionBits() [1/4]

Instr v8::internal::Instruction::InstructionBits ( ) const
inline

Definition at line 443 of file constants-arm.h.

443  {
444  return *reinterpret_cast<const Instr*>(this);
445  }

Referenced by Bit(), BitField(), Bits(), FunctionFieldRaw(), Mask(), OpcodeFieldRaw(), RdFieldRaw(), RsFieldRaw(), RsFieldRawNoAssert(), RtFieldRaw(), SaFieldRaw(), and SImmed24Value().

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◆ InstructionBits() [2/4]

Instr v8::internal::Instruction::InstructionBits ( ) const
inline

Definition at line 99 of file instructions-arm64.h.

99  {
100  return *reinterpret_cast<const Instr*>(this);
101  }

◆ InstructionBits() [3/4]

Instr v8::internal::Instruction::InstructionBits ( ) const
inline

Definition at line 740 of file constants-mips.h.

740  {
741  return *reinterpret_cast<const Instr*>(this);
742  }

◆ InstructionBits() [4/4]

Instr v8::internal::Instruction::InstructionBits ( ) const
inline

Definition at line 754 of file constants-mips64.h.

754  {
755  return *reinterpret_cast<const Instr*>(this);
756  }

◆ InstructionType() [1/2]

Type v8::internal::Instruction::InstructionType ( ) const

Referenced by FunctionValue(), Imm16Value(), Imm21Value(), Imm26Value(), RdFieldRaw(), RdValue(), RsFieldRaw(), RsValue(), RtFieldRaw(), RtValue(), SaFieldRaw(), and SaValue().

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◆ InstructionType() [2/2]

Type v8::internal::Instruction::InstructionType ( ) const

◆ IsAddSubExtended()

bool v8::internal::Instruction::IsAddSubExtended ( ) const
inline

Definition at line 204 of file instructions-arm64.h.

204  {
205  return Mask(AddSubExtendedFMask) == AddSubExtendedFixed;
206  }
v8::internal::Instruction::Mask
Instr Mask(uint32_t mask) const
Definition: instructions-arm64.h:120

References v8::internal::AddSubExtendedFixed, v8::internal::AddSubExtendedFMask, and Mask().

Referenced by RdMode(), and RnMode().

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◆ IsAddSubImmediate()

bool v8::internal::Instruction::IsAddSubImmediate ( ) const
inline

Definition at line 196 of file instructions-arm64.h.

196  {
197  return Mask(AddSubImmediateFMask) == AddSubImmediateFixed;
198  }

References v8::internal::AddSubImmediateFixed, v8::internal::AddSubImmediateFMask, and Mask().

Referenced by RdMode(), and RnMode().

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◆ IsAddSubShifted()

bool v8::internal::Instruction::IsAddSubShifted ( ) const
inline

Definition at line 200 of file instructions-arm64.h.

200  {
201  return Mask(AddSubShiftedFMask) == AddSubShiftedFixed;
202  }

References v8::internal::AddSubShiftedFixed, v8::internal::AddSubShiftedFMask, and Mask().

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◆ IsAdr()

bool v8::internal::Instruction::IsAdr ( ) const
inline

Definition at line 188 of file instructions-arm64.h.

188  {
189  return Mask(PCRelAddressingMask) == ADR;
190  }

References v8::internal::ADR, Mask(), and v8::internal::PCRelAddressingMask.

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◆ IsBranchAndLinkToRegister()

bool v8::internal::Instruction::IsBranchAndLinkToRegister ( ) const
inline

Definition at line 309 of file instructions-arm64.h.

309  {
310  return Mask(UnconditionalBranchToRegisterMask) == BLR;
311  }
v8::internal::UnconditionalBranchToRegisterMask
@ UnconditionalBranchToRegisterMask
Definition: constants-arm64.h:613

References v8::internal::BLR, Mask(), and v8::internal::UnconditionalBranchToRegisterMask.

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◆ IsCompareBranch()

bool v8::internal::Instruction::IsCompareBranch ( ) const
inline

Definition at line 164 of file instructions-arm64.h.

164  {
165  return Mask(CompareBranchFMask) == CompareBranchFixed;
166  }

References v8::internal::CompareBranchFixed, v8::internal::CompareBranchFMask, and Mask().

Referenced by BranchType().

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◆ IsCondBranchImm()

bool v8::internal::Instruction::IsCondBranchImm ( ) const
inline

Definition at line 156 of file instructions-arm64.h.

156  {
157  return Mask(ConditionalBranchFMask) == ConditionalBranchFixed;
158  }

References v8::internal::ConditionalBranchFixed, v8::internal::ConditionalBranchFMask, and Mask().

Referenced by BranchType().

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◆ IsForbiddenInBranchDelay() [1/2]

bool v8::internal::Instruction::IsForbiddenInBranchDelay ( ) const

◆ IsForbiddenInBranchDelay() [2/2]

bool v8::internal::Instruction::IsForbiddenInBranchDelay ( ) const

◆ IsImmBranch()

bool v8::internal::Instruction::IsImmBranch ( ) const
inline

Definition at line 172 of file instructions-arm64.h.

172  {
173  return BranchType() != UnknownBranchType;
174  }

References BranchType(), and v8::internal::UnknownBranchType.

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◆ IsLdrLiteral()

bool v8::internal::Instruction::IsLdrLiteral ( ) const
inline

Definition at line 176 of file instructions-arm64.h.

176  {
177  return Mask(LoadLiteralFMask) == LoadLiteralFixed;
178  }

References v8::internal::LoadLiteralFixed, v8::internal::LoadLiteralFMask, and Mask().

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◆ IsLdrLiteralX()

bool v8::internal::Instruction::IsLdrLiteralX ( ) const
inline

Definition at line 180 of file instructions-arm64.h.

180  {
181  return Mask(LoadLiteralMask) == LDR_x_lit;
182  }

References v8::internal::LDR_x_lit, v8::internal::LoadLiteralMask, and Mask().

Referenced by v8::internal::Assembler::target_pointer_address_at().

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◆ IsLinkingInstruction() [1/2]

bool v8::internal::Instruction::IsLinkingInstruction ( ) const

◆ IsLinkingInstruction() [2/2]

bool v8::internal::Instruction::IsLinkingInstruction ( ) const

◆ IsLoad()

bool v8::internal::Instruction::IsLoad ( ) const

◆ IsLoadOrStore()

bool v8::internal::Instruction::IsLoadOrStore ( ) const
inline

Definition at line 209 of file instructions-arm64.h.

209  {
210  return Mask(LoadStoreAnyFMask) == LoadStoreAnyFixed;
211  }

References v8::internal::LoadStoreAnyFixed, v8::internal::LoadStoreAnyFMask, and Mask().

Referenced by RnMode().

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◆ IsLogicalImmediate()

bool v8::internal::Instruction::IsLogicalImmediate ( ) const
inline

Definition at line 192 of file instructions-arm64.h.

192  {
193  return Mask(LogicalImmediateFMask) == LogicalImmediateFixed;
194  }

References v8::internal::LogicalImmediateFixed, v8::internal::LogicalImmediateFMask, and Mask().

Referenced by RdMode().

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◆ IsMiscType0()

bool v8::internal::Instruction::IsMiscType0 ( ) const
inline

Definition at line 606 of file constants-arm.h.

606  { return (Bit(24) == 1)
607  && (Bit(23) == 0)
608  && (Bit(20) == 0)
609  && ((Bit(7) == 0)); }

References Bit().

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◆ IsMovk()

bool v8::internal::Instruction::IsMovk ( ) const
inline

Definition at line 318 of file instructions-arm64.h.

318  {
319  return (Mask(MoveWideImmediateMask) == MOVK_x) ||
320  (Mask(MoveWideImmediateMask) == MOVK_w);
321  }

References Mask(), v8::internal::MoveWideImmediateMask, v8::internal::MOVK_w, and v8::internal::MOVK_x.

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◆ IsMovn()

bool v8::internal::Instruction::IsMovn ( ) const
inline

Definition at line 323 of file instructions-arm64.h.

323  {
324  return (Mask(MoveWideImmediateMask) == MOVN_x) ||
325  (Mask(MoveWideImmediateMask) == MOVN_w);
326  }

References Mask(), v8::internal::MoveWideImmediateMask, v8::internal::MOVN_w, and v8::internal::MOVN_x.

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◆ IsMovz()

bool v8::internal::Instruction::IsMovz ( ) const
inline

Definition at line 313 of file instructions-arm64.h.

313  {
314  return (Mask(MoveWideImmediateMask) == MOVZ_x) ||
315  (Mask(MoveWideImmediateMask) == MOVZ_w);
316  }

References Mask(), v8::internal::MoveWideImmediateMask, v8::internal::MOVZ_w, and v8::internal::MOVZ_x.

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◆ IsNop()

bool v8::internal::Instruction::IsNop ( int  n)
inline

Definition at line 328 of file instructions-arm64.h.

328  {
329  // A marking nop is an instruction
330  // mov r<n>, r<n>
331  // which is encoded as
332  // orr r<n>, xzr, r<n>
333  return (Mask(LogicalShiftedMask) == ORR_x) &&
334  (Rd() == Rm()) &&
335  (Rd() == n);
336  }

References v8::internal::LogicalShiftedMask, Mask(), and v8::internal::ORR_x.

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◆ IsNopType1()

bool v8::internal::Instruction::IsNopType1 ( ) const
inline

Definition at line 612 of file constants-arm.h.

612 { return Bits(24, 0) == 0x0120F000; }

References Bits().

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◆ IsPCRelAddressing()

bool v8::internal::Instruction::IsPCRelAddressing ( ) const
inline

Definition at line 184 of file instructions-arm64.h.

184  {
185  return Mask(PCRelAddressingFMask) == PCRelAddressingFixed;
186  }

References Mask(), v8::internal::PCRelAddressingFixed, and v8::internal::PCRelAddressingFMask.

Referenced by v8::internal::RecordWriteStub::GetMode(), ImmPCRel(), and v8::internal::RecordWriteStub::Patch().

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◆ IsSpecialType0()

bool v8::internal::Instruction::IsSpecialType0 ( ) const
inline

Definition at line 603 of file constants-arm.h.

603 { return (Bit(7) == 1) && (Bit(4) == 1); }

References Bit().

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◆ IsStop()

bool v8::internal::Instruction::IsStop ( ) const
inline

Definition at line 615 of file constants-arm.h.

615  {
616  return (TypeValue() == 7) && (Bit(24) == 1) && (SvcValue() >= kStopCode);
617  }
v8::internal::Instruction::SvcValue
SoftwareInterruptCodes SvcValue() const
Definition: constants-arm.h:597

References Bit(), v8::internal::kStopCode, SvcValue(), and TypeValue().

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◆ IsStore()

bool v8::internal::Instruction::IsStore ( ) const

◆ IsTargetInImmPCOffsetRange()

bool v8::internal::Instruction::IsTargetInImmPCOffsetRange ( Instruction *  target)

◆ IsTestBranch()

bool v8::internal::Instruction::IsTestBranch ( ) const
inline

Definition at line 168 of file instructions-arm64.h.

168  {
169  return Mask(TestBranchFMask) == TestBranchFixed;
170  }

References Mask(), v8::internal::TestBranchFixed, and v8::internal::TestBranchFMask.

Referenced by BranchType().

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◆ IsTrap() [1/2]

bool v8::internal::Instruction::IsTrap ( ) const

◆ IsTrap() [2/2]

bool v8::internal::Instruction::IsTrap ( ) const

◆ IsUncondBranchImm()

bool v8::internal::Instruction::IsUncondBranchImm ( ) const
inline

Definition at line 160 of file instructions-arm64.h.

160  {
161  return Mask(UnconditionalBranchFMask) == UnconditionalBranchFixed;
162  }

References Mask(), v8::internal::UnconditionalBranchFixed, and v8::internal::UnconditionalBranchFMask.

Referenced by BranchType(), v8::internal::RecordWriteStub::GetMode(), and v8::internal::RecordWriteStub::Patch().

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◆ IsValidImmPCOffset()

static bool v8::internal::Instruction::IsValidImmPCOffset ( ImmBranchType  branch_type,
int32_t  offset 
)
static

◆ IsValidPCRelOffset()

static bool v8::internal::Instruction::IsValidPCRelOffset ( int  offset)
inlinestatic

Definition at line 381 of file instructions-arm64.h.

381  {
382  return is_int21(offset);
383  }

◆ LinkValue()

int v8::internal::Instruction::LinkValue ( ) const
inline

Definition at line 593 of file constants-arm.h.

593 { return Bit(24); }

References Bit().

Referenced by HasLink().

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◆ LiteralAddress()

uintptr_t v8::internal::Instruction::LiteralAddress ( )
inline

Definition at line 355 of file instructions-arm64.h.

355  {
356  int offset = ImmLLiteral() << kLoadLiteralScaleLog2;
357  return reinterpret_cast<uintptr_t>(this) + offset;
358  }
uintptr_t
v8::internal::kLoadLiteralScaleLog2
const unsigned kLoadLiteralScaleLog2
Definition: constants-arm64.h:30

References v8::internal::kLoadLiteralScaleLog2.

◆ LValue()

int v8::internal::Instruction::LValue ( ) const
inline

Definition at line 580 of file constants-arm.h.

580 { return Bit(20); }

References Bit().

Referenced by HasL().

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◆ Mask()

Instr v8::internal::Instruction::Mask ( uint32_t  mask) const
inline

Definition at line 120 of file instructions-arm64.h.

120  {
121  return InstructionBits() & mask;
122  }

References InstructionBits().

Referenced by v8::internal::Decoder< V >::DecodeBitfieldExtract(), v8::internal::Decoder< V >::DecodeBranchSystemException(), v8::internal::Decoder< V >::DecodeDataProcessing(), v8::internal::Decoder< V >::DecodeFP(), v8::internal::Decoder< V >::DecodeLoadStore(), v8::internal::Decoder< V >::DecodeLogical(), v8::internal::Instrument::InstrumentLoadStore(), v8::internal::Instrument::InstrumentLoadStorePair(), IsAddSubExtended(), IsAddSubImmediate(), IsAddSubShifted(), IsAdr(), IsBranchAndLinkToRegister(), IsCompareBranch(), IsCondBranchImm(), IsLdrLiteral(), IsLdrLiteralX(), IsLoadOrStore(), IsLogicalImmediate(), IsMovk(), IsMovn(), IsMovz(), IsNop(), IsPCRelAddressing(), IsTestBranch(), IsUncondBranchImm(), RdMode(), and SizeLSPair().

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◆ MValue()

int v8::internal::Instruction::MValue ( ) const
inline

Definition at line 524 of file constants-arm.h.

524 { return Bit(5); }

References Bit().

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◆ NValue()

int v8::internal::Instruction::NValue ( ) const
inline

Definition at line 523 of file constants-arm.h.

523 { return Bit(7); }

References Bit().

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◆ Offset12Value()

int v8::internal::Instruction::Offset12Value ( ) const
inline

Definition at line 583 of file constants-arm.h.

583 { return Bits(11, 0); }

References Bits().

Referenced by ImmedMovwMovtValue().

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◆ Opc1Value()

int v8::internal::Instruction::Opc1Value ( ) const
inline

Definition at line 529 of file constants-arm.h.

529 { return (Bit(23) << 2) | Bits(21, 20); }

References Bit(), and Bits().

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◆ Opc2Value()

int v8::internal::Instruction::Opc2Value ( ) const
inline

Definition at line 530 of file constants-arm.h.

530 { return Bits(19, 16); }

References Bits().

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◆ Opc3Value()

int v8::internal::Instruction::Opc3Value ( ) const
inline

Definition at line 531 of file constants-arm.h.

531 { return Bits(7, 6); }

References Bits().

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◆ OpcodeField()

Opcode v8::internal::Instruction::OpcodeField ( ) const
inline

Definition at line 551 of file constants-arm.h.

551  {
552  return static_cast<Opcode>(BitField(24, 21));
553  }

References BitField().

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◆ OpcodeFieldRaw() [1/2]

Opcode v8::internal::Instruction::OpcodeFieldRaw ( ) const
inline

Definition at line 837 of file constants-mips.h.

837  {
838  return static_cast<Opcode>(InstructionBits() & kOpcodeMask);
839  }
v8::internal::kOpcodeMask
const int kOpcodeMask
Definition: constants-mips.h:295

References InstructionBits(), and v8::internal::kOpcodeMask.

Referenced by SecondaryValue().

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◆ OpcodeFieldRaw() [2/2]

Opcode v8::internal::Instruction::OpcodeFieldRaw ( ) const
inline

Definition at line 851 of file constants-mips64.h.

851  {
852  return static_cast<Opcode>(InstructionBits() & kOpcodeMask);
853  }

References InstructionBits(), and v8::internal::kOpcodeMask.

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◆ OpcodeValue() [1/3]

int v8::internal::Instruction::OpcodeValue ( ) const
inline

Definition at line 548 of file constants-arm.h.

548  {
549  return static_cast<Opcode>(Bits(24, 21));
550  }

References Bits().

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◆ OpcodeValue() [2/3]

Opcode v8::internal::Instruction::OpcodeValue ( ) const
inline

Definition at line 772 of file constants-mips.h.

772  {
773  return static_cast<Opcode>(
774  Bits(kOpcodeShift + kOpcodeBits - 1, kOpcodeShift));
775  }
v8::internal::kOpcodeBits
const int kOpcodeBits
Definition: constants-mips.h:250
v8::internal::kOpcodeShift
const int kOpcodeShift
Definition: constants-mips.h:249

References Bits(), v8::internal::kOpcodeBits, and v8::internal::kOpcodeShift.

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◆ OpcodeValue() [3/3]

Opcode v8::internal::Instruction::OpcodeValue ( ) const
inline

Definition at line 786 of file constants-mips64.h.

786  {
787  return static_cast<Opcode>(
788  Bits(kOpcodeShift + kOpcodeBits - 1, kOpcodeShift));
789  }

References Bits(), v8::internal::kOpcodeBits, and v8::internal::kOpcodeShift.

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◆ preceding()

Instruction* v8::internal::Instruction::preceding ( int  count = 1)
inline

Definition at line 128 of file instructions-arm64.h.

128  {
129  return following(-count);
130  }
v8::internal::Instruction::following
Instruction * following(int count=1)
Definition: instructions-arm64.h:124

References following().

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◆ PUField()

int v8::internal::Instruction::PUField ( ) const
inline

Definition at line 577 of file constants-arm.h.

577 { return BitField(24, 23); }

References BitField().

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◆ PUValue()

int v8::internal::Instruction::PUValue ( ) const
inline

Definition at line 576 of file constants-arm.h.

576 { return Bits(24, 23); }

References Bits().

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◆ PValue()

int v8::internal::Instruction::PValue ( ) const
inline

Definition at line 527 of file constants-arm.h.

527 { return Bit(24); }

References Bit().

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◆ RdFieldRaw() [1/2]

int v8::internal::Instruction::RdFieldRaw ( ) const
inline

Definition at line 858 of file constants-mips.h.

858  {
859  DCHECK(InstructionType() == kRegisterType);
860  return InstructionBits() & kRdFieldMask;
861  }
v8::internal::kRdFieldMask
const int kRdFieldMask
Definition: constants-mips.h:301

References DCHECK, InstructionBits(), InstructionType(), v8::internal::kRdFieldMask, and kRegisterType.

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◆ RdFieldRaw() [2/2]

int v8::internal::Instruction::RdFieldRaw ( ) const
inline

Definition at line 872 of file constants-mips64.h.

872  {
873  DCHECK(InstructionType() == kRegisterType);
874  return InstructionBits() & kRdFieldMask;
875  }

References DCHECK, InstructionBits(), InstructionType(), v8::internal::kRdFieldMask, and kRegisterType.

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◆ RdMode()

Reg31Mode v8::internal::Instruction::RdMode ( ) const
inline

Definition at line 220 of file instructions-arm64.h.

220  {
221  // The following instructions use csp or wsp as Rd:
222  // Add/sub (immediate) when not setting the flags.
223  // Add/sub (extended) when not setting the flags.
224  // Logical (immediate) when not setting the flags.
225  // Otherwise, r31 is the zero register.
226  if (IsAddSubImmediate() || IsAddSubExtended()) {
227  if (Mask(AddSubSetFlagsBit)) {
228  return Reg31IsZeroRegister;
229  } else {
230  return Reg31IsStackPointer;
231  }
232  }
233  if (IsLogicalImmediate()) {
234  // Of the logical (immediate) instructions, only ANDS (and its aliases)
235  // can set the flags. The others can all write into csp.
236  // Note that some logical operations are not available to
237  // immediate-operand instructions, so we have to combine two masks here.
238  if (Mask(LogicalImmediateMask & LogicalOpMask) == ANDS) {
239  return Reg31IsZeroRegister;
240  } else {
241  return Reg31IsStackPointer;
242  }
243  }
244  return Reg31IsZeroRegister;
245  }

References v8::internal::AddSubSetFlagsBit, v8::internal::ANDS, IsAddSubExtended(), IsAddSubImmediate(), IsLogicalImmediate(), v8::internal::LogicalImmediateMask, v8::internal::LogicalOpMask, Mask(), v8::internal::Reg31IsStackPointer, and v8::internal::Reg31IsZeroRegister.

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◆ RdValue() [1/3]

int v8::internal::Instruction::RdValue ( ) const
inline

Definition at line 514 of file constants-arm.h.

514 { return Bits(15, 12); }

References Bits().

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◆ RdValue() [2/3]

int v8::internal::Instruction::RdValue ( ) const
inline

Definition at line 789 of file constants-mips.h.

789  {
790  DCHECK(InstructionType() == kRegisterType);
791  return Bits(kRdShift + kRdBits - 1, kRdShift);
792  }
v8::internal::kRdShift
const int kRdShift
Definition: constants-mips.h:255
v8::internal::kRdBits
const int kRdBits
Definition: constants-mips.h:256

References Bits(), DCHECK, InstructionType(), v8::internal::kRdBits, v8::internal::kRdShift, and kRegisterType.

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◆ RdValue() [3/3]

int v8::internal::Instruction::RdValue ( ) const
inline

Definition at line 803 of file constants-mips64.h.

803  {
804  DCHECK(InstructionType() == kRegisterType);
805  return Bits(kRdShift + kRdBits - 1, kRdShift);
806  }

References Bits(), DCHECK, InstructionType(), v8::internal::kRdBits, v8::internal::kRdShift, and kRegisterType.

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◆ RegShiftValue()

int v8::internal::Instruction::RegShiftValue ( ) const
inline

Definition at line 562 of file constants-arm.h.

562 { return Bit(4); }

References Bit().

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◆ RlistValue()

int v8::internal::Instruction::RlistValue ( ) const
inline

Definition at line 585 of file constants-arm.h.

585 { return Bits(15, 0); }

References Bits().

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◆ RmValue()

int v8::internal::Instruction::RmValue ( ) const
inline

Definition at line 556 of file constants-arm.h.

556 { return Bits(3, 0); }

References Bits().

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◆ RnMode()

Reg31Mode v8::internal::Instruction::RnMode ( ) const
inline

Definition at line 249 of file instructions-arm64.h.

249  {
250  // The following instructions use csp or wsp as Rn:
251  // All loads and stores.
252  // Add/sub (immediate).
253  // Add/sub (extended).
254  // Otherwise, r31 is the zero register.
255  if (IsLoadOrStore() || IsAddSubImmediate() || IsAddSubExtended()) {
256  return Reg31IsStackPointer;
257  }
258  return Reg31IsZeroRegister;
259  }

References IsAddSubExtended(), IsAddSubImmediate(), IsLoadOrStore(), v8::internal::Reg31IsStackPointer, and v8::internal::Reg31IsZeroRegister.

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◆ RnValue()

int v8::internal::Instruction::RnValue ( ) const
inline

Definition at line 512 of file constants-arm.h.

512 { return Bits(19, 16); }

References Bits().

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◆ RotateValue()

int v8::internal::Instruction::RotateValue ( ) const
inline

Definition at line 566 of file constants-arm.h.

566 { return Bits(11, 8); }

References Bits().

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◆ RsFieldRaw() [1/2]

int v8::internal::Instruction::RsFieldRaw ( ) const
inline

Definition at line 841 of file constants-mips.h.

841  {
842  DCHECK(InstructionType() == kRegisterType ||
843  InstructionType() == kImmediateType);
844  return InstructionBits() & kRsFieldMask;
845  }
v8::internal::kRsFieldMask
const int kRsFieldMask
Definition: constants-mips.h:299

References DCHECK, InstructionBits(), InstructionType(), kImmediateType, kRegisterType, and v8::internal::kRsFieldMask.

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◆ RsFieldRaw() [2/2]

int v8::internal::Instruction::RsFieldRaw ( ) const
inline

Definition at line 855 of file constants-mips64.h.

855  {
856  DCHECK(InstructionType() == kRegisterType ||
857  InstructionType() == kImmediateType);
858  return InstructionBits() & kRsFieldMask;
859  }

References DCHECK, InstructionBits(), InstructionType(), kImmediateType, kRegisterType, and v8::internal::kRsFieldMask.

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◆ RsFieldRawNoAssert() [1/2]

int v8::internal::Instruction::RsFieldRawNoAssert ( ) const
inline

Definition at line 848 of file constants-mips.h.

848  {
849  return InstructionBits() & kRsFieldMask;
850  }

References InstructionBits(), and v8::internal::kRsFieldMask.

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◆ RsFieldRawNoAssert() [2/2]

int v8::internal::Instruction::RsFieldRawNoAssert ( ) const
inline

Definition at line 862 of file constants-mips64.h.

862  {
863  return InstructionBits() & kRsFieldMask;
864  }

References InstructionBits(), and v8::internal::kRsFieldMask.

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◆ RsValue() [1/3]

int v8::internal::Instruction::RsValue ( ) const
inline

Definition at line 563 of file constants-arm.h.

563 { return Bits(11, 8); }

References Bits().

Referenced by SecondaryValue().

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◆ RsValue() [2/3]

int v8::internal::Instruction::RsValue ( ) const
inline

Definition at line 777 of file constants-mips.h.

777  {
778  DCHECK(InstructionType() == kRegisterType ||
779  InstructionType() == kImmediateType);
780  return Bits(kRsShift + kRsBits - 1, kRsShift);
781  }
v8::internal::kRsBits
const int kRsBits
Definition: constants-mips.h:252
v8::internal::kRsShift
const int kRsShift
Definition: constants-mips.h:251

References Bits(), DCHECK, InstructionType(), kImmediateType, kRegisterType, v8::internal::kRsBits, and v8::internal::kRsShift.

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◆ RsValue() [3/3]

int v8::internal::Instruction::RsValue ( ) const
inline

Definition at line 791 of file constants-mips64.h.

791  {
792  DCHECK(InstructionType() == kRegisterType ||
793  InstructionType() == kImmediateType);
794  return Bits(kRsShift + kRsBits - 1, kRsShift);
795  }

References Bits(), DCHECK, InstructionType(), kImmediateType, kRegisterType, v8::internal::kRsBits, and v8::internal::kRsShift.

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◆ RtFieldRaw() [1/2]

int v8::internal::Instruction::RtFieldRaw ( ) const
inline

Definition at line 852 of file constants-mips.h.

852  {
853  DCHECK(InstructionType() == kRegisterType ||
854  InstructionType() == kImmediateType);
855  return InstructionBits() & kRtFieldMask;
856  }
v8::internal::kRtFieldMask
const int kRtFieldMask
Definition: constants-mips.h:300

References DCHECK, InstructionBits(), InstructionType(), kImmediateType, kRegisterType, and v8::internal::kRtFieldMask.

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◆ RtFieldRaw() [2/2]

int v8::internal::Instruction::RtFieldRaw ( ) const
inline

Definition at line 866 of file constants-mips64.h.

866  {
867  DCHECK(InstructionType() == kRegisterType ||
868  InstructionType() == kImmediateType);
869  return InstructionBits() & kRtFieldMask;
870  }

References DCHECK, InstructionBits(), InstructionType(), kImmediateType, kRegisterType, and v8::internal::kRtFieldMask.

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◆ RtValue() [1/3]

int v8::internal::Instruction::RtValue ( ) const
inline

Definition at line 526 of file constants-arm.h.

526 { return Bits(15, 12); }

References Bits().

Referenced by SecondaryValue().

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◆ RtValue() [2/3]

int v8::internal::Instruction::RtValue ( ) const
inline

Definition at line 783 of file constants-mips.h.

783  {
784  DCHECK(InstructionType() == kRegisterType ||
785  InstructionType() == kImmediateType);
786  return Bits(kRtShift + kRtBits - 1, kRtShift);
787  }
v8::internal::kRtShift
const int kRtShift
Definition: constants-mips.h:253
v8::internal::kRtBits
const int kRtBits
Definition: constants-mips.h:254

References Bits(), DCHECK, InstructionType(), kImmediateType, kRegisterType, v8::internal::kRtBits, and v8::internal::kRtShift.

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◆ RtValue() [3/3]

int v8::internal::Instruction::RtValue ( ) const
inline

Definition at line 797 of file constants-mips64.h.

797  {
798  DCHECK(InstructionType() == kRegisterType ||
799  InstructionType() == kImmediateType);
800  return Bits(kRtShift + kRtBits - 1, kRtShift);
801  }

References Bits(), DCHECK, InstructionType(), kImmediateType, kRegisterType, v8::internal::kRtBits, and v8::internal::kRtShift.

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◆ SaFieldRaw() [1/2]

int v8::internal::Instruction::SaFieldRaw ( ) const
inline

Definition at line 863 of file constants-mips.h.

863  {
864  DCHECK(InstructionType() == kRegisterType);
865  return InstructionBits() & kSaFieldMask;
866  }
v8::internal::kSaFieldMask
const int kSaFieldMask
Definition: constants-mips.h:302

References DCHECK, InstructionBits(), InstructionType(), kRegisterType, and v8::internal::kSaFieldMask.

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◆ SaFieldRaw() [2/2]

int v8::internal::Instruction::SaFieldRaw ( ) const
inline

Definition at line 877 of file constants-mips64.h.

877  {
878  DCHECK(InstructionType() == kRegisterType);
879  return InstructionBits() & kSaFieldMask;
880  }

References DCHECK, InstructionBits(), InstructionType(), kRegisterType, and v8::internal::kSaFieldMask.

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◆ SaValue() [1/2]

int v8::internal::Instruction::SaValue ( ) const
inline

Definition at line 794 of file constants-mips.h.

794  {
795  DCHECK(InstructionType() == kRegisterType);
796  return Bits(kSaShift + kSaBits - 1, kSaShift);
797  }
v8::internal::kSaBits
const int kSaBits
Definition: constants-mips.h:258
v8::internal::kSaShift
const int kSaShift
Definition: constants-mips.h:257

References Bits(), DCHECK, InstructionType(), kRegisterType, v8::internal::kSaBits, and v8::internal::kSaShift.

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◆ SaValue() [2/2]

int v8::internal::Instruction::SaValue ( ) const
inline

Definition at line 808 of file constants-mips64.h.

808  {
809  DCHECK(InstructionType() == kRegisterType);
810  return Bits(kSaShift + kSaBits - 1, kSaShift);
811  }

References Bits(), DCHECK, InstructionType(), kRegisterType, v8::internal::kSaBits, and v8::internal::kSaShift.

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◆ SecondaryValue() [1/2]

int v8::internal::Instruction::SecondaryValue ( ) const
inline

Definition at line 873 of file constants-mips.h.

873  {
874  Opcode op = OpcodeFieldRaw();
875  switch (op) {
876  case SPECIAL:
877  case SPECIAL2:
878  return FunctionValue();
879  case COP1:
880  return RsValue();
881  case REGIMM:
882  return RtValue();
883  default:
884  return NULLSF;
885  }
886  }
v8::internal::Instruction::OpcodeFieldRaw
Opcode OpcodeFieldRaw() const
Definition: constants-mips.h:837

References v8::internal::COP1, FunctionValue(), v8::internal::NULLSF, OpcodeFieldRaw(), v8::internal::REGIMM, RsValue(), RtValue(), v8::internal::SPECIAL, and v8::internal::SPECIAL2.

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◆ SecondaryValue() [2/2]

int v8::internal::Instruction::SecondaryValue ( ) const
inline

Definition at line 887 of file constants-mips64.h.

887  {
888  Opcode op = OpcodeFieldRaw();
889  switch (op) {
890  case SPECIAL:
891  case SPECIAL2:
892  return FunctionValue();
893  case COP1:
894  return RsValue();
895  case REGIMM:
896  return RtValue();
897  default:
898  return NULLSF;
899  }
900  }

References v8::internal::COP1, FunctionValue(), v8::internal::NULLSF, OpcodeFieldRaw(), v8::internal::REGIMM, RsValue(), RtValue(), v8::internal::SPECIAL, and v8::internal::SPECIAL2.

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◆ SetBranchImmTarget()

void v8::internal::Instruction::SetBranchImmTarget ( Instruction *  target)

◆ SetImmLLiteral()

void v8::internal::Instruction::SetImmLLiteral ( Instruction *  source)

◆ SetImmPCOffsetTarget()

void v8::internal::Instruction::SetImmPCOffsetTarget ( Instruction *  target)

◆ SetInstructionBits() [1/4]

void v8::internal::Instruction::SetInstructionBits ( Instr  new_instr)
inline

Definition at line 103 of file instructions-arm64.h.

103  {
104  *reinterpret_cast<Instr*>(this) = new_instr;
105  }

◆ SetInstructionBits() [2/4]

void v8::internal::Instruction::SetInstructionBits ( Instr  value)
inline

Definition at line 448 of file constants-arm.h.

448  {
449  *reinterpret_cast<Instr*>(this) = value;
450  }

◆ SetInstructionBits() [3/4]

void v8::internal::Instruction::SetInstructionBits ( Instr  value)
inline

Definition at line 745 of file constants-mips.h.

745  {
746  *reinterpret_cast<Instr*>(this) = value;
747  }

◆ SetInstructionBits() [4/4]

void v8::internal::Instruction::SetInstructionBits ( Instr  value)
inline

Definition at line 759 of file constants-mips64.h.

759  {
760  *reinterpret_cast<Instr*>(this) = value;
761  }

◆ SetPCRelImmTarget()

void v8::internal::Instruction::SetPCRelImmTarget ( Instruction *  target)

◆ ShiftAmountValue()

int v8::internal::Instruction::ShiftAmountValue ( ) const
inline

Definition at line 564 of file constants-arm.h.

564 { return Bits(11, 7); }

References Bits().

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◆ ShiftField()

ShiftOp v8::internal::Instruction::ShiftField ( ) const
inline

Definition at line 559 of file constants-arm.h.

559  {
560  return static_cast<ShiftOp>(BitField(6, 5));
561  }

References BitField().

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◆ ShiftValue()

int v8::internal::Instruction::ShiftValue ( ) const
inline

Definition at line 558 of file constants-arm.h.

558 { return static_cast<ShiftOp>(Bits(6, 5)); }

References Bits().

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◆ SignedBits()

int32_t v8::internal::Instruction::SignedBits ( int  msb,
int  lsb 
) const
inline

Definition at line 115 of file instructions-arm64.h.

115  {
116  int32_t bits = *(reinterpret_cast<const int32_t*>(this));
117  return signed_bitextract_32(msb, lsb, bits);
118  }
unibrow::int32_t
int int32_t
Definition: unicode.cc:24

References v8::internal::signed_bitextract_32().

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◆ SignValue()

int v8::internal::Instruction::SignValue ( ) const
inline

Definition at line 587 of file constants-arm.h.

587 { return Bit(6); }

References Bit().

Referenced by HasSign().

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◆ SImmed24Value()

int v8::internal::Instruction::SImmed24Value ( ) const
inline

Definition at line 594 of file constants-arm.h.

594 { return ((InstructionBits() << 8) >> 8); }

References InstructionBits().

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◆ SizeLSPair()

LSDataSize v8::internal::Instruction::SizeLSPair ( ) const
inline

Definition at line 150 of file instructions-arm64.h.

150  {
151  return CalcLSPairDataSize(
152  static_cast<LoadStorePairOp>(Mask(LoadStorePairMask)));
153  }
v8::internal::CalcLSPairDataSize
LSDataSize CalcLSPairDataSize(LoadStorePairOp op)

References v8::internal::CalcLSPairDataSize(), v8::internal::LoadStorePairMask, and Mask().

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◆ SpecialValue()

int v8::internal::Instruction::SpecialValue ( ) const
inline

Definition at line 510 of file constants-arm.h.

510 { return Bits(27, 23); }

References Bits().

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◆ SValue()

int v8::internal::Instruction::SValue ( ) const
inline

Definition at line 554 of file constants-arm.h.

554 { return Bit(20); }

References Bit().

Referenced by HasS().

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◆ SvcValue()

SoftwareInterruptCodes v8::internal::Instruction::SvcValue ( ) const
inline

Definition at line 597 of file constants-arm.h.

597  {
598  return static_cast<SoftwareInterruptCodes>(Bits(23, 0));
599  }

References Bits().

Referenced by IsStop().

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◆ SzValue()

int v8::internal::Instruction::SzValue ( ) const
inline

Definition at line 532 of file constants-arm.h.

532 { return Bit(8); }

References Bit().

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◆ TypeValue()

int v8::internal::Instruction::TypeValue ( ) const
inline

Definition at line 509 of file constants-arm.h.

509 { return Bits(27, 25); }

References Bits().

Referenced by IsStop().

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◆ UValue()

int v8::internal::Instruction::UValue ( ) const
inline

Definition at line 528 of file constants-arm.h.

528 { return Bit(23); }

References Bit().

Referenced by HasU().

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◆ VAValue()

int v8::internal::Instruction::VAValue ( ) const
inline

Definition at line 535 of file constants-arm.h.

535 { return Bits(23, 21); }

References Bits().

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◆ VBValue()

int v8::internal::Instruction::VBValue ( ) const
inline

Definition at line 536 of file constants-arm.h.

536 { return Bits(6, 5); }

References Bits().

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◆ VCValue()

int v8::internal::Instruction::VCValue ( ) const
inline

Definition at line 534 of file constants-arm.h.

534 { return Bit(8); }

References Bit().

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◆ VdValue()

int v8::internal::Instruction::VdValue ( ) const
inline

Definition at line 522 of file constants-arm.h.

522 { return Bits(15, 12); }

References Bits().

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◆ VFPDRegValue()

int v8::internal::Instruction::VFPDRegValue ( VFPRegPrecision  pre)
inline

Definition at line 543 of file constants-arm.h.

543  {
544  return VFPGlueRegValue(pre, 12, 22);
545  }
v8::internal::Instruction::VFPGlueRegValue
int VFPGlueRegValue(VFPRegPrecision pre, int four_bit, int one_bit)
Definition: constants-arm.h:646

References VFPGlueRegValue().

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◆ VFPGlueRegValue()

int v8::internal::Instruction::VFPGlueRegValue ( VFPRegPrecision  pre,
int  four_bit,
int  one_bit 
)
inlineprivate

Definition at line 646 of file constants-arm.h.

646  {
647  if (pre == kSinglePrecision) {
648  return (Bits(four_bit + 3, four_bit) << 1) | Bit(one_bit);
649  }
650  return (Bit(one_bit) << 4) | Bits(four_bit + 3, four_bit);
651  }

References Bit(), Bits(), and v8::internal::kSinglePrecision.

Referenced by VFPDRegValue(), VFPMRegValue(), and VFPNRegValue().

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◆ VFPMRegValue()

int v8::internal::Instruction::VFPMRegValue ( VFPRegPrecision  pre)
inline

Definition at line 540 of file constants-arm.h.

540  {
541  return VFPGlueRegValue(pre, 0, 5);
542  }

References VFPGlueRegValue().

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◆ VFPNRegValue()

int v8::internal::Instruction::VFPNRegValue ( VFPRegPrecision  pre)
inline

Definition at line 537 of file constants-arm.h.

537  {
538  return VFPGlueRegValue(pre, 16, 7);
539  }

References VFPGlueRegValue().

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◆ VLValue()

int v8::internal::Instruction::VLValue ( ) const
inline

Definition at line 533 of file constants-arm.h.

533 { return Bit(20); }

References Bit().

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◆ VmValue()

int v8::internal::Instruction::VmValue ( ) const
inline

Definition at line 521 of file constants-arm.h.

521 { return Bits(3, 0); }

References Bits().

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◆ VnValue()

int v8::internal::Instruction::VnValue ( ) const
inline

Definition at line 520 of file constants-arm.h.

520 { return Bits(19, 16); }

References Bits().

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◆ WValue()

int v8::internal::Instruction::WValue ( ) const
inline

Definition at line 579 of file constants-arm.h.

579 { return Bit(21); }

References Bit().

Referenced by HasW().

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Member Data Documentation

◆ ImmPCRelRangeBitwidth

const int v8::internal::Instruction::ImmPCRelRangeBitwidth = 21
static

Definition at line 380 of file instructions-arm64.h.

The documentation for this class was generated from the following files: