V8 Project
v8::internal::compiler::AddressingModeMatcher Class Reference
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Public Member Functions

 AddressingModeMatcher (IA32OperandGenerator *g, Node *base, Node *index)
 
AddressingMode GetMode (AddressingMode one, int power)
 
size_t SetInputs (InstructionOperand **inputs)
 
 AddressingModeMatcher (X64OperandGenerator *g, Node *base, Node *index)
 
AddressingMode GetMode (AddressingMode one, int power)
 
size_t SetInputs (InstructionOperand **inputs)
 

Public Attributes

InstructionOperandbase_operand_
 
InstructionOperandindex_operand_
 
InstructionOperanddisplacement_operand_
 
AddressingMode mode_
 

Static Public Attributes

static const int kMaxInputCount = 3
 

Detailed Description

Definition at line 47 of file instruction-selector-ia32.cc.

Constructor & Destructor Documentation

◆ AddressingModeMatcher() [1/2]

v8::internal::compiler::AddressingModeMatcher::AddressingModeMatcher ( IA32OperandGenerator *  g,
Node *  base,
Node *  index 
)
inline

Definition at line 49 of file instruction-selector-ia32.cc.

53  mode_(kMode_None) {
54  Int32Matcher index_imm(index);
55  if (index_imm.HasValue()) {
56  int32_t displacement = index_imm.Value();
57  // Compute base operand and fold base immediate into displacement.
58  Int32Matcher base_imm(base);
59  if (!base_imm.HasValue()) {
60  base_operand_ = g->UseRegister(base);
61  } else {
62  displacement += base_imm.Value();
63  }
64  if (displacement != 0 || base_operand_ == NULL) {
65  displacement_operand_ = g->TempImmediate(displacement);
66  }
67  if (base_operand_ == NULL) {
68  mode_ = kMode_MI;
69  } else {
70  if (displacement == 0) {
71  mode_ = kMode_MR;
72  } else {
73  mode_ = kMode_MRI;
74  }
75  }
76  } else {
77  // Compute index and displacement.
78  IndexAndDisplacementMatcher matcher(index);
79  index_operand_ = g->UseRegister(matcher.index_node());
80  int32_t displacement = matcher.displacement();
81  // Compute base operand and fold base immediate into displacement.
82  Int32Matcher base_imm(base);
83  if (!base_imm.HasValue()) {
84  base_operand_ = g->UseRegister(base);
85  } else {
86  displacement += base_imm.Value();
87  }
88  // Compute displacement operand.
89  if (displacement != 0) {
90  displacement_operand_ = g->TempImmediate(displacement);
91  }
92  // Compute mode with scale factor one.
93  if (base_operand_ == NULL) {
94  if (displacement_operand_ == NULL) {
95  mode_ = kMode_M1;
96  } else {
97  mode_ = kMode_M1I;
98  }
99  } else {
100  if (displacement_operand_ == NULL) {
101  mode_ = kMode_MR1;
102  } else {
103  mode_ = kMode_MR1I;
104  }
105  }
106  // Adjust mode to actual scale factor.
107  mode_ = GetMode(mode_, matcher.power());
108  // Don't emit instructions with scale factor 1 if there's no base.
109  if (mode_ == kMode_M1) {
110  mode_ = kMode_MR;
111  } else if (mode_ == kMode_M1I) {
112  mode_ = kMode_MRI;
113  }
114  }
115  DCHECK_NE(kMode_None, mode_);
116  }
AddressingMode GetMode(AddressingMode one, int power)
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be NULL
#define DCHECK_NE(v1, v2)
Definition: logging.h:207
int int32_t
Definition: unicode.cc:24
IntMatcher< int32_t, IrOpcode::kInt32Constant > Int32Matcher
Definition: node-matchers.h:79

References base_operand_, DCHECK_NE, v8::internal::compiler::IndexAndDisplacementMatcher::displacement(), displacement_operand_, GetMode(), v8::internal::compiler::IndexAndDisplacementMatcher::index_node(), index_operand_, mode_, NULL, and v8::internal::compiler::IndexAndDisplacementMatcher::power().

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◆ AddressingModeMatcher() [2/2]

v8::internal::compiler::AddressingModeMatcher::AddressingModeMatcher ( X64OperandGenerator *  g,
Node *  base,
Node *  index 
)
inline

Definition at line 59 of file instruction-selector-x64.cc.

63  mode_(kMode_None) {
64  Int32Matcher index_imm(index);
65  if (index_imm.HasValue()) {
66  int32_t value = index_imm.Value();
67  if (value == 0) {
68  mode_ = kMode_MR;
69  } else {
70  mode_ = kMode_MRI;
71  index_operand_ = g->UseImmediate(index);
72  }
73  base_operand_ = g->UseRegister(base);
74  } else {
75  // Compute base operand.
76  Int64Matcher base_imm(base);
77  if (!base_imm.HasValue() || base_imm.Value() != 0) {
78  base_operand_ = g->UseRegister(base);
79  }
80  // Compute index and displacement.
81  IndexAndDisplacementMatcher matcher(index);
82  index_operand_ = g->UseRegister(matcher.index_node());
83  if (matcher.displacement() != 0) {
84  displacement_operand_ = g->TempImmediate(matcher.displacement());
85  }
86  // Compute mode with scale factor one.
87  if (base_operand_ == NULL) {
88  if (displacement_operand_ == NULL) {
89  mode_ = kMode_M1;
90  } else {
91  mode_ = kMode_M1I;
92  }
93  } else {
94  if (displacement_operand_ == NULL) {
95  mode_ = kMode_MR1;
96  } else {
97  mode_ = kMode_MR1I;
98  }
99  }
100  // Adjust mode to actual scale factor.
101  mode_ = GetMode(mode_, matcher.power());
102  }
103  DCHECK_NE(kMode_None, mode_);
104  }
IntMatcher< int64_t, IrOpcode::kInt64Constant > Int64Matcher
Definition: node-matchers.h:81

References base_operand_, DCHECK_NE, v8::internal::compiler::IndexAndDisplacementMatcher::displacement(), displacement_operand_, GetMode(), v8::internal::compiler::IndexAndDisplacementMatcher::index_node(), index_operand_, mode_, NULL, and v8::internal::compiler::IndexAndDisplacementMatcher::power().

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Member Function Documentation

◆ GetMode() [1/2]

AddressingMode v8::internal::compiler::AddressingModeMatcher::GetMode ( AddressingMode  one,
int  power 
)
inline

Definition at line 118 of file instruction-selector-ia32.cc.

118  {
119  return static_cast<AddressingMode>(static_cast<int>(one) + power);
120  }

Referenced by AddressingModeMatcher().

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◆ GetMode() [2/2]

AddressingMode v8::internal::compiler::AddressingModeMatcher::GetMode ( AddressingMode  one,
int  power 
)
inline

Definition at line 106 of file instruction-selector-x64.cc.

106  {
107  return static_cast<AddressingMode>(static_cast<int>(one) + power);
108  }

◆ SetInputs() [1/2]

size_t v8::internal::compiler::AddressingModeMatcher::SetInputs ( InstructionOperand **  inputs)
inline

Definition at line 122 of file instruction-selector-ia32.cc.

122  {
123  size_t input_count = 0;
124  // Compute inputs_ and input_count.
125  if (base_operand_ != NULL) {
126  inputs[input_count++] = base_operand_;
127  }
128  if (index_operand_ != NULL) {
129  inputs[input_count++] = index_operand_;
130  }
131  if (displacement_operand_ != NULL) {
132  inputs[input_count++] = displacement_operand_;
133  }
134  DCHECK_NE(input_count, 0);
135  return input_count;
136  }

References base_operand_, DCHECK_NE, displacement_operand_, index_operand_, and NULL.

◆ SetInputs() [2/2]

size_t v8::internal::compiler::AddressingModeMatcher::SetInputs ( InstructionOperand **  inputs)
inline

Definition at line 110 of file instruction-selector-x64.cc.

110  {
111  size_t input_count = 0;
112  // Compute inputs_ and input_count.
113  if (base_operand_ != NULL) {
114  inputs[input_count++] = base_operand_;
115  }
116  if (index_operand_ != NULL) {
117  inputs[input_count++] = index_operand_;
118  }
119  if (displacement_operand_ != NULL) {
120  // Pure displacement mode not supported by x64.
121  DCHECK_NE(input_count, 0);
122  inputs[input_count++] = displacement_operand_;
123  }
124  DCHECK_NE(input_count, 0);
125  return input_count;
126  }

References base_operand_, DCHECK_NE, displacement_operand_, index_operand_, and NULL.

Member Data Documentation

◆ base_operand_

InstructionOperand * v8::internal::compiler::AddressingModeMatcher::base_operand_

Definition at line 139 of file instruction-selector-ia32.cc.

Referenced by AddressingModeMatcher(), and SetInputs().

◆ displacement_operand_

InstructionOperand * v8::internal::compiler::AddressingModeMatcher::displacement_operand_

Definition at line 141 of file instruction-selector-ia32.cc.

Referenced by AddressingModeMatcher(), and SetInputs().

◆ index_operand_

InstructionOperand * v8::internal::compiler::AddressingModeMatcher::index_operand_

Definition at line 140 of file instruction-selector-ia32.cc.

Referenced by AddressingModeMatcher(), and SetInputs().

◆ kMaxInputCount

static const int v8::internal::compiler::AddressingModeMatcher::kMaxInputCount = 3
static

Definition at line 138 of file instruction-selector-ia32.cc.

◆ mode_

AddressingMode v8::internal::compiler::AddressingModeMatcher::mode_

Definition at line 142 of file instruction-selector-ia32.cc.

Referenced by AddressingModeMatcher().


The documentation for this class was generated from the following files: