28 code->InvalidateRelocation();
33 DeoptimizationInputData* deopt_data =
34 DeoptimizationInputData::cast(code->deoptimization_data());
35 Address code_start_address = code->instruction_start();
41 for (
int i = 0;
i < deopt_data->DeoptCount();
i++) {
42 if (deopt_data->Pc(
i)->value() == -1)
continue;
44 Address call_address = code_start_address + deopt_data->Pc(
i)->value();
50 patcher.dc64(
reinterpret_cast<intptr_t
>(deopt_entry));
53 (call_address >= prev_call_address +
patch_size()));
56 prev_call_address = call_address;
92 FrameDescription* output_frame, CodeStubDescriptor* descriptor) {
93 ApiFunction
function(descriptor->deoptimization_handler());
94 ExternalReference xref(&
function, ExternalReference::BUILTIN_CALL,
isolate_);
95 intptr_t handler =
reinterpret_cast<intptr_t
>(xref.address());
96 int params = descriptor->GetHandlerParameterCount();
97 output_frame->SetRegister(x0.code(), params);
98 output_frame->SetRegister(x1.code(), handler);
105 output_frame->SetDoubleRegister(
i, double_value);
113 void Deoptimizer::EntryGenerator::Generate() {
123 __ PushCPURegList(saved_fp_registers);
127 saved_registers.Combine(
fp);
128 __ PushCPURegList(saved_registers);
130 const int kSavedRegistersAreaSize =
132 (saved_fp_registers.Count() *
kDRegSize);
135 const int kFPRegistersOffset = saved_registers.Count() *
kXRegSize;
138 Register bailout_id = x2;
139 __ Peek(bailout_id, kSavedRegistersAreaSize);
141 Register code_object = x3;
142 Register fp_to_sp = x4;
145 __ Mov(code_object,
lr);
147 __ Add(fp_to_sp, masm()->StackPointer(),
149 __ Sub(fp_to_sp,
fp, fp_to_sp);
158 __ Mov(x5, ExternalReference::isolate_address(isolate()));
162 AllowExternalCallThatCantCauseGC scope(masm());
163 __ CallCFunction(ExternalReference::new_deoptimizer_function(isolate()), 6);
167 Register deoptimizer = x0;
173 CPURegList copy_to_input = saved_registers;
174 for (
int i = 0;
i < saved_registers.Count();
i++) {
176 CPURegister current_reg = copy_to_input.PopLowestIndex();
183 for (
int i = 0;
i < saved_fp_registers.Count();
i++) {
186 int src_offset = kFPRegistersOffset + (
i *
kDoubleSize);
187 __ Peek(x2, src_offset);
192 __ Drop(1 + (kSavedRegistersAreaSize /
kXRegSize));
196 Register unwind_limit = x2;
198 __ Add(unwind_limit, unwind_limit,
__ StackPointer());
205 Label pop_loop_header;
206 __ B(&pop_loop_header);
210 __ Bind(&pop_loop_header);
211 __ Cmp(unwind_limit,
__ StackPointer());
219 AllowExternalCallThatCantCauseGC scope(masm());
221 ExternalReference::compute_output_frames_function(isolate()), 1);
226 Label outer_push_loop, inner_push_loop,
227 outer_loop_header, inner_loop_header;
231 __ B(&outer_loop_header);
233 __ Bind(&outer_push_loop);
234 Register current_frame = x2;
237 __ B(&inner_loop_header);
239 __ Bind(&inner_push_loop);
241 __ Add(x6, current_frame, x3);
244 __ Bind(&inner_loop_header);
245 __ Cbnz(x3, &inner_push_loop);
248 __ Bind(&outer_loop_header);
250 __ B(
lt, &outer_push_loop);
253 DCHECK(!saved_fp_registers.IncludesAliasOf(crankshaft_fp_scratch) &&
254 !saved_fp_registers.IncludesAliasOf(fp_zero) &&
255 !saved_fp_registers.IncludesAliasOf(fp_scratch));
257 while (!saved_fp_registers.IsEmpty()) {
258 const CPURegister reg = saved_fp_registers.PopLowestIndex();
280 DCHECK(!saved_registers.IncludesAliasOf(
lr));
281 Register last_output_frame =
lr;
282 __ Mov(last_output_frame, current_frame);
286 Register continuation = x7;
287 saved_registers.Remove(continuation);
289 while (!saved_registers.IsEmpty()) {
291 CPURegister current_reg = saved_registers.PopLowestIndex();
294 __ Ldr(current_reg,
MemOperand(last_output_frame, offset));
300 __ InitializeRootRegister();
311 UseScratchRegisterScope temps(masm());
312 Register entry_id = temps.AcquireX();
318 InstructionAccurateScope scope(masm());
326 int start = masm()->pc_offset();
328 __ movz(entry_id,
i);
339 SetFrameSlot(offset, value);
344 SetFrameSlot(offset, value);
virtual void GeneratePrologue()
static int output_offset()
static const int table_entry_size_
void CopyDoubleRegisters(FrameDescription *output_frame)
static Address GetDeoptimizationEntry(Isolate *isolate, int id, BailoutType type, GetEntryMode mode=ENSURE_ENTRY_CODE)
static int input_offset()
static void PatchCodeForDeoptimization(Isolate *isolate, Code *code)
static int output_count_offset()
static const int kMaxNumberOfEntries
void SetPlatformCompiledStubRegisters(FrameDescription *output_frame, CodeStubDescriptor *desc)
bool HasAlignmentPadding(JSFunction *function)
FrameDescription * input_
Isolate * isolate() const
void FillInputFrame(Address tos, JavaScriptFrame *frame)
static int frame_size_offset()
void SetCallerFp(unsigned offset, intptr_t value)
uint32_t GetFrameSize() const
static int continuation_offset()
static int frame_content_offset()
void SetCallerConstantPool(unsigned offset, intptr_t value)
static int state_offset()
static int registers_offset()
double GetDoubleRegister(unsigned n) const
static int double_registers_offset()
void SetRegister(unsigned n, intptr_t value)
void SetCallerPc(unsigned offset, intptr_t value)
void SetFrameSlot(unsigned offset, intptr_t value)
void SetDoubleRegister(unsigned n, double value)
static const int kFunctionOffset
static uint64_t & uint64_at(Address addr)
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be NULL
#define DCHECK(condition)
static int Push(SpecialRPOStackFrame *stack, int depth, BasicBlock *child, int unvisited)
const unsigned kDRegSizeInBits
const unsigned kXRegSizeInBits
const int kPointerSizeLog2
const unsigned kLoadLiteralScaleLog2
const unsigned kInstructionSize
Debugger support for the V8 JavaScript engine.
static int NumAllocatableRegisters()
static const int kMaxNumRegisters
static const RegList kAllocatableFPRegisters
static int NumRegisters()