18 const int kCallInstructionSizeInWords = 4;
24 Address code_start_address = code->instruction_start();
27 code->InvalidateRelocation();
29 if (FLAG_zap_code_space) {
31 byte* pointer = code->FindCodeAgeSequence();
32 if (pointer !=
NULL) {
35 pointer = code->instruction_start();
37 CodePatcher patcher(pointer, 1);
38 patcher.masm()->break_(0xCC);
40 DeoptimizationInputData* data =
41 DeoptimizationInputData::cast(code->deoptimization_data());
42 int osr_offset = data->OsrPcOffset()->value();
44 CodePatcher osr_patcher(code->instruction_start() + osr_offset, 1);
45 osr_patcher.masm()->break_(0xCC);
49 DeoptimizationInputData* deopt_data =
50 DeoptimizationInputData::cast(code->deoptimization_data());
56 for (
int i = 0;
i < deopt_data->DeoptCount();
i++) {
57 if (deopt_data->Pc(
i)->value() == -1)
continue;
58 Address call_address = code_start_address + deopt_data->Pc(
i)->value();
65 CodePatcher patcher(call_address, call_size_in_words);
68 call_address >= prev_call_address +
patch_size());
72 prev_call_address = call_address;
100 FrameDescription* output_frame, CodeStubDescriptor* descriptor) {
101 ApiFunction
function(descriptor->deoptimization_handler());
102 ExternalReference xref(&
function, ExternalReference::BUILTIN_CALL,
isolate_);
103 intptr_t handler =
reinterpret_cast<intptr_t
>(xref.address());
104 int params = descriptor->GetHandlerParameterCount();
105 output_frame->SetRegister(a0.code(), params);
106 output_frame->SetRegister(a1.code(), handler);
113 output_frame->SetDoubleRegister(
i, double_value);
129 void Deoptimizer::EntryGenerator::Generate() {
137 RegList saved_regs = restored_regs |
sp.
bit() | ra.bit();
139 const int kDoubleRegsSize =
143 __ Subu(
sp,
sp, Operand(kDoubleRegsSize));
154 if ((saved_regs & (1 <<
i)) != 0) {
159 const int kSavedRegistersAreaSize =
176 __ PrepareCallCFunction(6, t1);
178 __ li(a1, Operand(type()));
182 __ li(t1, Operand(ExternalReference::isolate_address(isolate())));
186 AllowExternalCallThatCantCauseGC scope(masm());
187 __ CallCFunction(ExternalReference::new_deoptimizer_function(isolate()), 6);
200 if ((saved_regs & (1 <<
i)) != 0) {
203 }
else if (FLAG_debug_code) {
232 Label pop_loop_header;
233 __ BranchShort(&pop_loop_header);
238 __ bind(&pop_loop_header);
239 __ BranchShort(&pop_loop,
ne, a2, Operand(
sp));
244 __ PrepareCallCFunction(1, a1);
247 AllowExternalCallThatCantCauseGC scope(masm());
249 ExternalReference::compute_output_frames_function(isolate()), 1);
254 Label outer_push_loop, inner_push_loop,
255 outer_loop_header, inner_loop_header;
262 __ jmp(&outer_loop_header);
263 __ bind(&outer_push_loop);
267 __ jmp(&inner_loop_header);
268 __ bind(&inner_push_loop);
270 __ Addu(t2, a2, Operand(a3));
273 __ bind(&inner_loop_header);
274 __ BranchShort(&inner_push_loop,
ne, a3, Operand(zero_reg));
277 __ bind(&outer_loop_header);
278 __ BranchShort(&outer_push_loop,
lt, t0, Operand(a1));
299 DCHECK(!(at.bit() & restored_regs));
304 if ((restored_regs & (1 <<
i)) != 0) {
309 __ InitializeRootRegister();
314 __ stop(
"Unreachable.");
326 Label table_start, done, done_special, trampoline_jump;
327 __ bind(&table_start);
328 int kMaxEntriesBranchReach = (1 << (
kImm16Bits - 2))/
331 if (
count() <= kMaxEntriesBranchReach) {
343 DCHECK_EQ(masm()->SizeOfCodeGeneratedSince(&table_start),
351 for (
int i = kMaxEntriesBranchReach;
i > 1;
i--) {
360 __ bind(&trampoline_jump);
364 for (
int i = kMaxEntriesBranchReach ;
i <
count();
i++) {
372 DCHECK_EQ(masm()->SizeOfCodeGeneratedSince(&table_start),
374 __ bind(&done_special);
375 __ addiu(at, at, kMaxEntriesBranchReach);
383 SetFrameSlot(offset, value);
388 SetFrameSlot(offset, value);
static const int kInstrSize
friend class BlockTrampolinePoolScope
virtual void GeneratePrologue()
static int output_offset()
static const int table_entry_size_
void CopyDoubleRegisters(FrameDescription *output_frame)
static Address GetDeoptimizationEntry(Isolate *isolate, int id, BailoutType type, GetEntryMode mode=ENSURE_ENTRY_CODE)
static int input_offset()
static void PatchCodeForDeoptimization(Isolate *isolate, Code *code)
static int output_count_offset()
void SetPlatformCompiledStubRegisters(FrameDescription *output_frame, CodeStubDescriptor *desc)
bool HasAlignmentPadding(JSFunction *function)
FrameDescription * input_
Isolate * isolate() const
void FillInputFrame(Address tos, JavaScriptFrame *frame)
static int frame_size_offset()
void SetCallerFp(unsigned offset, intptr_t value)
uint32_t GetFrameSize() const
static int continuation_offset()
static int frame_content_offset()
void SetCallerConstantPool(unsigned offset, intptr_t value)
static int state_offset()
static int registers_offset()
double GetDoubleRegister(unsigned n) const
static int double_registers_offset()
void SetRegister(unsigned n, intptr_t value)
void SetCallerPc(unsigned offset, intptr_t value)
void SetFrameSlot(unsigned offset, intptr_t value)
void SetDoubleRegister(unsigned n, double value)
static const int kFunctionOffset
static int CallSize(Register target, Condition cond=al)
static uint32_t & uint32_at(Address addr)
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be NULL
#define DCHECK(condition)
#define DCHECK_EQ(v1, v2)
static int Push(SpecialRPOStackFrame *stack, int depth, BasicBlock *child, int unvisited)
const uint32_t kDebugZapValue
const RegList kJSCallerSaved
const RegList kCalleeSaved
const int kPointerSizeLog2
MemOperand CFunctionArgumentOperand(int index)
Register ToRegister(int num)
const unsigned kNumberOfRegisters
static const int kNoCodeAgeSequenceLength
Debugger support for the V8 JavaScript engine.
static int NumAllocatableRegisters()
static const int kMaxNumRegisters
static FPURegister FromAllocationIndex(int index)
static const int kMaxNumAllocatableRegisters
static int NumAllocatableRegisters()
static const int kNumRegisters