7 #if V8_TARGET_ARCH_ARM64
60 void FastNewClosureDescriptor::Initialize(CallInterfaceDescriptorData* data) {
63 Register registers[] = {
cp, x2};
68 void FastNewContextDescriptor::Initialize(CallInterfaceDescriptorData* data) {
71 Register registers[] = {
cp, x1};
76 void ToNumberDescriptor::Initialize(CallInterfaceDescriptorData* data) {
79 Register registers[] = {
cp, x0};
84 void NumberToStringDescriptor::Initialize(CallInterfaceDescriptorData* data) {
87 Register registers[] = {
cp, x0};
92 void FastCloneShallowArrayDescriptor::Initialize(
93 CallInterfaceDescriptorData* data) {
98 Register registers[] = {
cp, x3, x2, x1};
99 Representation representations[] = {
106 void FastCloneShallowObjectDescriptor::Initialize(
107 CallInterfaceDescriptorData* data) {
113 Register registers[] = {
cp, x3, x2, x1, x0};
118 void CreateAllocationSiteDescriptor::Initialize(
119 CallInterfaceDescriptorData* data) {
123 Register registers[] = {
cp, x2, x3};
128 void StoreArrayLiteralElementDescriptor::Initialize(
129 CallInterfaceDescriptorData* data) {
130 Register registers[] = {
cp, x3, x0};
135 void CallFunctionDescriptor::Initialize(CallInterfaceDescriptorData* data) {
137 Register registers[] = {
cp, x1};
142 void CallFunctionWithFeedbackDescriptor::Initialize(
143 CallInterfaceDescriptorData* data) {
144 Register registers[] = {
cp, x1, x3};
152 void CallConstructDescriptor::Initialize(CallInterfaceDescriptorData* data) {
159 Register registers[] = {
cp, x0, x1, x2};
164 void RegExpConstructResultDescriptor::Initialize(
165 CallInterfaceDescriptorData* data) {
170 Register registers[] = {
cp, x2, x1, x0};
175 void TransitionElementsKindDescriptor::Initialize(
176 CallInterfaceDescriptorData* data) {
180 Register registers[] = {
cp, x0, x1};
185 void ArrayConstructorConstantArgCountDescriptor::Initialize(
186 CallInterfaceDescriptorData* data) {
191 Register registers[] = {
cp, x1, x2};
196 void ArrayConstructorDescriptor::Initialize(CallInterfaceDescriptorData* data) {
198 Register registers[] = {
cp, x1, x2, x0};
199 Representation representations[] = {
206 void InternalArrayConstructorConstantArgCountDescriptor::Initialize(
207 CallInterfaceDescriptorData* data) {
211 Register registers[] = {
cp, x1};
216 void InternalArrayConstructorDescriptor::Initialize(
217 CallInterfaceDescriptorData* data) {
219 Register registers[] = {
cp, x1, x0};
227 void CompareNilDescriptor::Initialize(CallInterfaceDescriptorData* data) {
230 Register registers[] = {
cp, x0};
235 void ToBooleanDescriptor::Initialize(CallInterfaceDescriptorData* data) {
238 Register registers[] = {
cp, x0};
243 void BinaryOpDescriptor::Initialize(CallInterfaceDescriptorData* data) {
247 Register registers[] = {
cp, x1, x0};
252 void BinaryOpWithAllocationSiteDescriptor::Initialize(
253 CallInterfaceDescriptorData* data) {
258 Register registers[] = {
cp, x2, x1, x0};
263 void StringAddDescriptor::Initialize(CallInterfaceDescriptorData* data) {
267 Register registers[] = {
cp, x1, x0};
272 void KeyedDescriptor::Initialize(CallInterfaceDescriptorData* data) {
273 static PlatformInterfaceDescriptor noInlineDescriptor =
276 Register registers[] = {
280 Representation representations[] = {
285 &noInlineDescriptor);
289 void NamedDescriptor::Initialize(CallInterfaceDescriptorData* data) {
290 static PlatformInterfaceDescriptor noInlineDescriptor =
293 Register registers[] = {
297 Representation representations[] = {
302 &noInlineDescriptor);
306 void CallHandlerDescriptor::Initialize(CallInterfaceDescriptorData* data) {
307 static PlatformInterfaceDescriptor default_descriptor =
310 Register registers[] = {
314 Representation representations[] = {
319 &default_descriptor);
323 void ArgumentAdaptorDescriptor::Initialize(CallInterfaceDescriptorData* data) {
324 static PlatformInterfaceDescriptor default_descriptor =
327 Register registers[] = {
333 Representation representations[] = {
340 &default_descriptor);
344 void ApiFunctionDescriptor::Initialize(CallInterfaceDescriptorData* data) {
345 static PlatformInterfaceDescriptor default_descriptor =
348 Register registers[] = {
355 Representation representations[] = {
363 &default_descriptor);
static const Register function_address()
static const Register parameter_count()
static const Register index()
void Initialize(int register_parameter_count, Register *registers, Representation *param_representations, PlatformInterfaceDescriptor *platform_descriptor=NULL)
static const Register ContextRegister()
const CallInterfaceDescriptorData * data() const
static const Register MapRegister()
static const Register left()
static const Register right()
static const Register ReceiverRegister()
static const Register NameRegister()
static const Register exponent()
static const Register exponent()
static Representation External()
static Representation Smi()
static Representation Integer32()
static Representation Tagged()
static const Register ReceiverRegister()
static const Register NameRegister()
static const Register ValueRegister()
static const Register VectorRegister()
static const Register SlotRegister()
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be NULL
@ CAN_INLINE_TARGET_ADDRESS
@ NEVER_INLINE_TARGET_ADDRESS
Debugger support for the V8 JavaScript engine.