5 #ifndef V8_CALL_INTERFACE_DESCRIPTOR_H_
6 #define V8_CALL_INTERFACE_DESCRIPTOR_H_
14 class PlatformInterfaceDescriptor;
16 #define INTERFACE_DESCRIPTOR_LIST(V) \
19 V(ElementTransitionAndStore) \
21 V(VectorLoadICTrampoline) \
27 V(FastCloneShallowArray) \
28 V(FastCloneShallowObject) \
29 V(CreateAllocationSite) \
31 V(CallFunctionWithFeedback) \
33 V(RegExpConstructResult) \
34 V(TransitionElementsKind) \
35 V(ArrayConstructorConstantArgCount) \
37 V(InternalArrayConstructorConstantArgCount) \
38 V(InternalArrayConstructor) \
42 V(BinaryOpWithAllocationSite) \
50 V(ArgumentsAccessRead) \
51 V(StoreArrayLiteralElement) \
110 #define DEF_ENUM(name) name,
123 :
data_(isolate->call_descriptor_data(key)) {}
136 DCHECK(index <
data()->register_param_count());
137 if (
data()->register_param_representations() ==
NULL) {
175 #define DECLARE_DESCRIPTOR(name, base) \
176 explicit name(Isolate* isolate) : base(isolate, key()) { \
177 if (!data()->IsInitialized()) \
178 Initialize(isolate->call_descriptor_data(key())); \
182 void Initialize(CallInterfaceDescriptorData* data); \
183 name(Isolate* isolate, CallDescriptors::Key key) : base(isolate, key) {} \
186 static inline CallDescriptors::Key key();
467 #undef DECLARE_DESCRIPTOR
472 #define DEF_KEY(name) \
473 CallDescriptors::Key name##Descriptor::key() { return CallDescriptors::name; }
480 #if V8_TARGET_ARCH_ARM64
482 #elif V8_TARGET_ARCH_ARM
Representation register_param_representation(int index) const
Register register_param(int index) const
SmartArrayPointer< Register > register_params_
CallInterfaceDescriptorData()
DISALLOW_COPY_AND_ASSIGN(CallInterfaceDescriptorData)
Register * register_params() const
int register_param_count() const
PlatformInterfaceDescriptor * platform_specific_descriptor_
void Initialize(int register_parameter_count, Register *registers, Representation *param_representations, PlatformInterfaceDescriptor *platform_descriptor=NULL)
PlatformInterfaceDescriptor * platform_specific_descriptor() const
bool IsInitialized() const
SmartArrayPointer< Representation > register_param_representations_
Representation * register_param_representations() const
int register_param_count_
const char * DebugName(Isolate *isolate)
Register GetParameterRegister(int index) const
PlatformInterfaceDescriptor * platform_specific_descriptor() const
Register GetEnvironmentParameterRegister(int index) const
Representation GetParameterRepresentation(int index) const
Representation GetEnvironmentParameterRepresentation(int index) const
const CallInterfaceDescriptorData * data_
int GetEnvironmentLength() const
int GetEnvironmentParameterCount() const
int GetRegisterParameterCount() const
CallInterfaceDescriptor()
static const Register ContextRegister()
CallInterfaceDescriptor(Isolate *isolate, CallDescriptors::Key key)
const CallInterfaceDescriptorData * data() const
static const Register MapRegister()
static const Register left()
static const Register right()
static const Register ReceiverRegister()
static const Register NameRegister()
static Representation Tagged()
static const Register ReceiverRegister()
static const Register NameRegister()
static const Register ValueRegister()
static const Register VectorRegister()
static const Register SlotRegister()
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be NULL
#define INTERFACE_DESCRIPTOR_LIST(V)
#define DECLARE_DESCRIPTOR(name, base)
#define DCHECK(condition)
Debugger support for the V8 JavaScript engine.