5 #ifndef V8_REGEXP_MACRO_ASSEMBLER_TRACER_H_
6 #define V8_REGEXP_MACRO_ASSEMBLER_TRACER_H_
21 virtual void Bind(Label* label);
47 Label* on_not_in_range);
53 virtual void GoTo(Label* label);
54 virtual void IfRegisterGE(
int reg,
int comparand, Label* if_ge);
55 virtual void IfRegisterLT(
int reg,
int comparand, Label* if_lt);
59 Label* on_end_of_input,
60 bool check_bounds =
true,
virtual void CheckCharacterAfterAnd(unsigned c, unsigned and_with, Label *on_equal)
virtual void CheckCharacterNotInRange(uc16 from, uc16 to, Label *on_not_in_range)
virtual void CheckNotCharacterAfterMinusAnd(uc16 c, uc16 minus, uc16 and_with, Label *on_not_equal)
virtual Handle< HeapObject > GetCode(Handle< String > source)
virtual void LoadCurrentCharacter(int cp_offset, Label *on_end_of_input, bool check_bounds=true, int characters=1)
virtual int stack_limit_slack()
virtual void IfRegisterLT(int reg, int comparand, Label *if_lt)
virtual void AdvanceCurrentPosition(int by)
virtual void GoTo(Label *label)
virtual void CheckCharacterLT(uc16 limit, Label *on_less)
virtual void AdvanceRegister(int reg, int by)
virtual void CheckNotBackReferenceIgnoreCase(int start_reg, Label *on_no_match)
virtual void CheckNotBackReference(int start_reg, Label *on_no_match)
virtual void IfRegisterEqPos(int reg, Label *if_eq)
virtual void Bind(Label *label)
virtual ~RegExpMacroAssemblerTracer()
virtual void CheckCharacterInRange(uc16 from, uc16 to, Label *on_in_range)
virtual void CheckNotCharacterAfterAnd(unsigned c, unsigned and_with, Label *on_not_equal)
virtual void SetCurrentPositionFromEnd(int by)
virtual void CheckCharacter(unsigned c, Label *on_equal)
virtual void CheckCharacterGT(uc16 limit, Label *on_greater)
virtual void PushBacktrack(Label *label)
RegExpMacroAssemblerTracer(RegExpMacroAssembler *assembler)
virtual void PopRegister(int register_index)
virtual void WriteCurrentPositionToRegister(int reg, int cp_offset)
virtual void ReadCurrentPositionFromRegister(int reg)
virtual void ReadStackPointerFromRegister(int reg)
virtual void SetRegister(int register_index, int to)
virtual void IfRegisterGE(int reg, int comparand, Label *if_ge)
virtual void CheckNotCharacter(unsigned c, Label *on_not_equal)
virtual void CheckGreedyLoop(Label *on_tos_equals_current_position)
virtual void PushRegister(int register_index, StackCheckFlag check_stack_limit)
virtual IrregexpImplementation Implementation()
virtual void WriteStackPointerToRegister(int reg)
RegExpMacroAssembler * assembler_
virtual bool CanReadUnaligned()
virtual void ClearRegisters(int reg_from, int reg_to)
virtual void PushCurrentPosition()
virtual void PopCurrentPosition()
virtual void CheckAtStart(Label *on_at_start)
virtual void CheckBitInTable(Handle< ByteArray > table, Label *on_bit_set)
virtual void CheckNotAtStart(Label *on_not_at_start)
virtual bool CheckSpecialCharacterClass(uc16 type, Label *on_no_match)
virtual bool CanReadUnaligned()=0
virtual int stack_limit_slack()=0
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be expose gc extension under the specified name show built in functions in stack traces use random jit cookie to mask large constants minimum length for automatic enable preparsing CPU profiler sampling interval in microseconds trace out of bounds accesses to external arrays default size of stack region v8 is allowed to maximum length of function source code printed in a stack trace min size of a semi the new space consists of two semi spaces print one trace line following each garbage collection do not print trace line after scavenger collection print cumulative GC statistics in only print modified registers Trace simulator debug messages Implied by trace sim abort randomize hashes to avoid predictable hash Fixed seed to use to hash property Print the time it takes to deserialize the snapshot A filename with extra code to be included in the A file to write the raw snapshot bytes to(mksnapshot only)") DEFINE_STRING(raw_context_file
Debugger support for the V8 JavaScript engine.