16 switch (write_barrier_kind) {
18 return os <<
"NoWriteBarrier";
20 return os <<
"FullWriteBarrier";
28 return os <<
"(" << rep.machine_type() <<
" : " << rep.write_barrier_kind()
38 static int HashCode(
const StoreRepresentation& rep) {
39 return rep.machine_type() + rep.write_barrier_kind();
41 static bool Equals(
const StoreRepresentation& rep1,
42 const StoreRepresentation& rep2) {
60 #define PURE_OP_LIST(V) \
61 V(Word32And, Operator::kAssociative | Operator::kCommutative, 2, 1) \
62 V(Word32Or, Operator::kAssociative | Operator::kCommutative, 2, 1) \
63 V(Word32Xor, Operator::kAssociative | Operator::kCommutative, 2, 1) \
64 V(Word32Shl, Operator::kNoProperties, 2, 1) \
65 V(Word32Shr, Operator::kNoProperties, 2, 1) \
66 V(Word32Sar, Operator::kNoProperties, 2, 1) \
67 V(Word32Ror, Operator::kNoProperties, 2, 1) \
68 V(Word32Equal, Operator::kCommutative, 2, 1) \
69 V(Word64And, Operator::kAssociative | Operator::kCommutative, 2, 1) \
70 V(Word64Or, Operator::kAssociative | Operator::kCommutative, 2, 1) \
71 V(Word64Xor, Operator::kAssociative | Operator::kCommutative, 2, 1) \
72 V(Word64Shl, Operator::kNoProperties, 2, 1) \
73 V(Word64Shr, Operator::kNoProperties, 2, 1) \
74 V(Word64Sar, Operator::kNoProperties, 2, 1) \
75 V(Word64Ror, Operator::kNoProperties, 2, 1) \
76 V(Word64Equal, Operator::kCommutative, 2, 1) \
77 V(Int32Add, Operator::kAssociative | Operator::kCommutative, 2, 1) \
78 V(Int32AddWithOverflow, Operator::kAssociative | Operator::kCommutative, 2, \
80 V(Int32Sub, Operator::kNoProperties, 2, 1) \
81 V(Int32SubWithOverflow, Operator::kNoProperties, 2, 2) \
82 V(Int32Mul, Operator::kAssociative | Operator::kCommutative, 2, 1) \
83 V(Int32Div, Operator::kNoProperties, 2, 1) \
84 V(Int32UDiv, Operator::kNoProperties, 2, 1) \
85 V(Int32Mod, Operator::kNoProperties, 2, 1) \
86 V(Int32UMod, Operator::kNoProperties, 2, 1) \
87 V(Int32LessThan, Operator::kNoProperties, 2, 1) \
88 V(Int32LessThanOrEqual, Operator::kNoProperties, 2, 1) \
89 V(Uint32LessThan, Operator::kNoProperties, 2, 1) \
90 V(Uint32LessThanOrEqual, Operator::kNoProperties, 2, 1) \
91 V(Int64Add, Operator::kAssociative | Operator::kCommutative, 2, 1) \
92 V(Int64Sub, Operator::kNoProperties, 2, 1) \
93 V(Int64Mul, Operator::kAssociative | Operator::kCommutative, 2, 1) \
94 V(Int64Div, Operator::kNoProperties, 2, 1) \
95 V(Int64UDiv, Operator::kNoProperties, 2, 1) \
96 V(Int64Mod, Operator::kNoProperties, 2, 1) \
97 V(Int64UMod, Operator::kNoProperties, 2, 1) \
98 V(Int64LessThan, Operator::kNoProperties, 2, 1) \
99 V(Int64LessThanOrEqual, Operator::kNoProperties, 2, 1) \
100 V(ChangeFloat32ToFloat64, Operator::kNoProperties, 1, 1) \
101 V(ChangeFloat64ToInt32, Operator::kNoProperties, 1, 1) \
102 V(ChangeFloat64ToUint32, Operator::kNoProperties, 1, 1) \
103 V(ChangeInt32ToFloat64, Operator::kNoProperties, 1, 1) \
104 V(ChangeInt32ToInt64, Operator::kNoProperties, 1, 1) \
105 V(ChangeUint32ToFloat64, Operator::kNoProperties, 1, 1) \
106 V(ChangeUint32ToUint64, Operator::kNoProperties, 1, 1) \
107 V(TruncateFloat64ToFloat32, Operator::kNoProperties, 1, 1) \
108 V(TruncateFloat64ToInt32, Operator::kNoProperties, 1, 1) \
109 V(TruncateInt64ToInt32, Operator::kNoProperties, 1, 1) \
110 V(Float64Add, Operator::kCommutative, 2, 1) \
111 V(Float64Sub, Operator::kNoProperties, 2, 1) \
112 V(Float64Mul, Operator::kCommutative, 2, 1) \
113 V(Float64Div, Operator::kNoProperties, 2, 1) \
114 V(Float64Mod, Operator::kNoProperties, 2, 1) \
115 V(Float64Sqrt, Operator::kNoProperties, 1, 1) \
116 V(Float64Equal, Operator::kCommutative, 2, 1) \
117 V(Float64LessThan, Operator::kNoProperties, 2, 1) \
118 V(Float64LessThanOrEqual, Operator::kNoProperties, 2, 1)
121 #define MACHINE_TYPE_LIST(V) \
144 #define PURE(Name, properties, input_count, output_count) \
145 struct Name##Operator FINAL : public SimpleOperator { \
147 : SimpleOperator(IrOpcode::k##Name, Operator::kPure | properties, \
148 input_count, output_count, #Name) {} \
150 Name##Operator k##Name;
155 struct Load##Type##Operator FINAL : public Operator1<LoadRepresentation> { \
156 Load##Type##Operator() \
157 : Operator1<LoadRepresentation>( \
158 IrOpcode::kLoad, Operator::kNoThrow | Operator::kNoWrite, 2, 1, \
159 "Load", k##Type) {} \
161 Load##Type##Operator k##Load##Type;
165 #define STORE(Type) \
166 struct Store##Type##Operator : public Operator1<StoreRepresentation> { \
167 explicit Store##Type##Operator(WriteBarrierKind write_barrier_kind) \
168 : Operator1<StoreRepresentation>( \
169 IrOpcode::kStore, Operator::kNoRead | Operator::kNoThrow, 3, 0, \
170 "Store", StoreRepresentation(k##Type, write_barrier_kind)) {} \
172 struct Store##Type##NoWriteBarrier##Operator FINAL \
173 : public Store##Type##Operator { \
174 Store##Type##NoWriteBarrier##Operator() \
175 : Store##Type##Operator(kNoWriteBarrier) {} \
177 struct Store##Type##FullWriteBarrier##Operator FINAL \
178 : public Store##Type##Operator { \
179 Store##Type##FullWriteBarrier##Operator() \
180 : Store##Type##Operator(kFullWriteBarrier) {} \
182 Store##Type##NoWriteBarrier##Operator k##Store##Type##NoWriteBarrier; \
183 Store##Type##FullWriteBarrier##Operator k##Store##Type##FullWriteBarrier;
193 MachineOperatorBuilder::MachineOperatorBuilder(
MachineType word)
194 : impl_(
kImpl.Get()), word_(word) {
199 #define PURE(Name, properties, input_count, output_count) \
200 const Operator* MachineOperatorBuilder::Name() { return &impl_.k##Name; }
209 return &impl_.k##Load##Type;
221 const Operator* MachineOperatorBuilder::Store(StoreRepresentation rep) {
222 switch (rep.machine_type()) {
223 #define STORE(Type) \
225 switch (rep.write_barrier_kind()) { \
226 case kNoWriteBarrier: \
227 return &impl_.k##Store##Type##NoWriteBarrier; \
228 case kFullWriteBarrier: \
229 return &impl_.k##Store##Type##FullWriteBarrier; \
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be NULL
#define LAZY_INSTANCE_INITIALIZER
#define DCHECK(condition)
#define PURE(Name, properties, input_count, output_count)
#define MACHINE_TYPE_LIST(V)
std::ostream & operator<<(std::ostream &os, const MachineType &type)
static base::LazyInstance< CommonOperatorBuilderImpl >::type kImpl
MachineType LoadRepresentation
Debugger support for the V8 JavaScript engine.
static OStream & PrintTo(OStream &os, LoadRepresentation type)
static int HashCode(LoadRepresentation type)
static bool Equals(LoadRepresentation lhs, LoadRepresentation rhs)
static bool Equals(const StoreRepresentation &rep1, const StoreRepresentation &rep2)
static int HashCode(const StoreRepresentation &rep)
static OStream & PrintTo(OStream &os, const StoreRepresentation &rep)