V8 Project
regexp-macro-assembler-mips.h
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1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4 
5 
6 #ifndef V8_MIPS_REGEXP_MACRO_ASSEMBLER_MIPS_H_
7 #define V8_MIPS_REGEXP_MACRO_ASSEMBLER_MIPS_H_
8 
9 #include "src/macro-assembler.h"
13 
14 namespace v8 {
15 namespace internal {
16 
17 #ifndef V8_INTERPRETED_REGEXP
19  public:
20  RegExpMacroAssemblerMIPS(Mode mode, int registers_to_save, Zone* zone);
22  virtual int stack_limit_slack();
23  virtual void AdvanceCurrentPosition(int by);
24  virtual void AdvanceRegister(int reg, int by);
25  virtual void Backtrack();
26  virtual void Bind(Label* label);
27  virtual void CheckAtStart(Label* on_at_start);
28  virtual void CheckCharacter(uint32_t c, Label* on_equal);
30  uint32_t mask,
31  Label* on_equal);
32  virtual void CheckCharacterGT(uc16 limit, Label* on_greater);
33  virtual void CheckCharacterLT(uc16 limit, Label* on_less);
34  // A "greedy loop" is a loop that is both greedy and with a simple
35  // body. It has a particularly simple implementation.
36  virtual void CheckGreedyLoop(Label* on_tos_equals_current_position);
37  virtual void CheckNotAtStart(Label* on_not_at_start);
38  virtual void CheckNotBackReference(int start_reg, Label* on_no_match);
39  virtual void CheckNotBackReferenceIgnoreCase(int start_reg,
40  Label* on_no_match);
41  virtual void CheckNotCharacter(uint32_t c, Label* on_not_equal);
43  uint32_t mask,
44  Label* on_not_equal);
46  uc16 minus,
47  uc16 mask,
48  Label* on_not_equal);
49  virtual void CheckCharacterInRange(uc16 from,
50  uc16 to,
51  Label* on_in_range);
52  virtual void CheckCharacterNotInRange(uc16 from,
53  uc16 to,
54  Label* on_not_in_range);
55  virtual void CheckBitInTable(Handle<ByteArray> table, Label* on_bit_set);
56 
57  // Checks whether the given offset from the current position is before
58  // the end of the string.
59  virtual void CheckPosition(int cp_offset, Label* on_outside_input);
60  virtual bool CheckSpecialCharacterClass(uc16 type,
61  Label* on_no_match);
62  virtual void Fail();
64  virtual void GoTo(Label* label);
65  virtual void IfRegisterGE(int reg, int comparand, Label* if_ge);
66  virtual void IfRegisterLT(int reg, int comparand, Label* if_lt);
67  virtual void IfRegisterEqPos(int reg, Label* if_eq);
69  virtual void LoadCurrentCharacter(int cp_offset,
70  Label* on_end_of_input,
71  bool check_bounds = true,
72  int characters = 1);
73  virtual void PopCurrentPosition();
74  virtual void PopRegister(int register_index);
75  virtual void PushBacktrack(Label* label);
76  virtual void PushCurrentPosition();
77  virtual void PushRegister(int register_index,
78  StackCheckFlag check_stack_limit);
79  virtual void ReadCurrentPositionFromRegister(int reg);
80  virtual void ReadStackPointerFromRegister(int reg);
81  virtual void SetCurrentPositionFromEnd(int by);
82  virtual void SetRegister(int register_index, int to);
83  virtual bool Succeed();
84  virtual void WriteCurrentPositionToRegister(int reg, int cp_offset);
85  virtual void ClearRegisters(int reg_from, int reg_to);
86  virtual void WriteStackPointerToRegister(int reg);
87  virtual bool CanReadUnaligned();
88 
89  // Called from RegExp if the stack-guard is triggered.
90  // If the code object is relocated, the return address is fixed before
91  // returning.
92  static int CheckStackGuardState(Address* return_address,
93  Code* re_code,
94  Address re_frame);
95 
96  private:
97  // Offsets from frame_pointer() of function parameters and stored registers.
98  static const int kFramePointer = 0;
99 
100  // Above the frame pointer - Stored registers and stack passed parameters.
101  // Registers s0 to s7, fp, and ra.
102  static const int kStoredRegisters = kFramePointer;
103  // Return address (stored from link register, read into pc on return).
104  static const int kReturnAddress = kStoredRegisters + 9 * kPointerSize;
106  // Stack frame header.
108  // Stack parameters placed by caller.
109  static const int kRegisterOutput = kStackFrameHeader + 20;
112  static const int kDirectCall = kStackHighEnd + kPointerSize;
113  static const int kIsolate = kDirectCall + kPointerSize;
114 
115  // Below the frame pointer.
116  // Register parameters stored by setup code.
117  static const int kInputEnd = kFramePointer - kPointerSize;
118  static const int kInputStart = kInputEnd - kPointerSize;
119  static const int kStartIndex = kInputStart - kPointerSize;
120  static const int kInputString = kStartIndex - kPointerSize;
121  // When adding local variables remember to push space for them in
122  // the frame in GetCode.
125  // First register address. Following registers are below it on the stack.
127 
128  // Initial size of code buffer.
129  static const size_t kRegExpCodeSize = 1024;
130 
131  // Load a number of characters at the given offset from the
132  // current position, into the current-character register.
133  void LoadCurrentCharacterUnchecked(int cp_offset, int character_count);
134 
135  // Check whether preemption has been requested.
137 
138  // Check whether we are exceeding the stack limit on the backtrack stack.
140 
141 
142  // Generate a call to CheckStackGuardState.
144 
145  // The ebp-relative location of a regexp register.
146  MemOperand register_location(int register_index);
147 
148  // Register holding the current input position as negative offset from
149  // the end of the string.
150  inline Register current_input_offset() { return t2; }
151 
152  // The register containing the current character after LoadCurrentCharacter.
153  inline Register current_character() { return t3; }
154 
155  // Register holding address of the end of the input string.
156  inline Register end_of_input_address() { return t6; }
157 
158  // Register holding the frame address. Local variables, parameters and
159  // regexp registers are addressed relative to this.
160  inline Register frame_pointer() { return fp; }
161 
162  // The register containing the backtrack stack top. Provides a meaningful
163  // name to the register.
164  inline Register backtrack_stackpointer() { return t4; }
165 
166  // Register holding pointer to the current code object.
167  inline Register code_pointer() { return t1; }
168 
169  // Byte size of chars in the string to match (decided by the Mode argument).
170  inline int char_size() { return static_cast<int>(mode_); }
171 
172  // Equivalent to a conditional branch to the label, unless the label
173  // is NULL, in which case it is a conditional Backtrack.
174  void BranchOrBacktrack(Label* to,
175  Condition condition,
176  Register rs,
177  const Operand& rt);
178 
179  // Call and return internally in the generated code in a way that
180  // is GC-safe (i.e., doesn't leave absolute code addresses on the stack)
181  inline void SafeCall(Label* to,
182  Condition cond,
183  Register rs,
184  const Operand& rt);
185  inline void SafeReturn();
186  inline void SafeCallTarget(Label* name);
187 
188  // Pushes the value of a register on the backtrack stack. Decrements the
189  // stack pointer by a word size and stores the register's value there.
190  inline void Push(Register source);
191 
192  // Pops a value from the backtrack stack. Reads the word at the stack pointer
193  // and increments it by a word size.
194  inline void Pop(Register target);
195 
196  Isolate* isolate() const { return masm_->isolate(); }
197 
199 
200  // Which mode to generate code for (Latin1 or UC16).
202 
203  // One greater than maximal register index actually used.
205 
206  // Number of registers to output at the end (the saved registers
207  // are always 0..num_saved_registers_-1).
209 
210  // Labels used internally.
215  Label exit_label_;
219 };
220 
221 #endif // V8_INTERPRETED_REGEXP
222 
223 
224 }} // namespace v8::internal
225 
226 #endif // V8_MIPS_REGEXP_MACRO_ASSEMBLER_MIPS_H_
Isolate * isolate() const
Definition: assembler.h:62
virtual void CheckNotBackReference(int start_reg, Label *on_no_match)
virtual void SetCurrentPositionFromEnd(int by)
virtual void CheckCharacter(uint32_t c, Label *on_equal)
MemOperand register_location(int register_index)
virtual void CheckNotCharacterAfterMinusAnd(uc16 c, uc16 minus, uc16 mask, Label *on_not_equal)
void BranchOrBacktrack(Label *to, Condition condition, Register rs, const Operand &rt)
virtual void CheckAtStart(Label *on_at_start)
virtual void CheckCharacterInRange(uc16 from, uc16 to, Label *on_in_range)
virtual void LoadCurrentCharacter(int cp_offset, Label *on_end_of_input, bool check_bounds=true, int characters=1)
void SafeCall(Label *to, Condition cond, Register rs, const Operand &rt)
virtual void CheckCharacterAfterAnd(uint32_t c, uint32_t mask, Label *on_equal)
virtual void ReadCurrentPositionFromRegister(int reg)
virtual IrregexpImplementation Implementation()
virtual void CheckBitInTable(Handle< ByteArray > table, Label *on_bit_set)
virtual void CheckNotBackReferenceIgnoreCase(int start_reg, Label *on_no_match)
virtual void CheckNotAtStart(Label *on_not_at_start)
void LoadCurrentCharacterUnchecked(int cp_offset, int character_count)
virtual void CheckCharacterNotInRange(uc16 from, uc16 to, Label *on_not_in_range)
virtual void ReadStackPointerFromRegister(int reg)
virtual void IfRegisterGE(int reg, int comparand, Label *if_ge)
virtual void CheckNotCharacterAfterAnd(uint32_t c, uint32_t mask, Label *on_not_equal)
virtual void IfRegisterLT(int reg, int comparand, Label *if_lt)
void CallCheckStackGuardState(Register scratch)
virtual void CheckCharacterGT(uc16 limit, Label *on_greater)
virtual void WriteStackPointerToRegister(int reg)
virtual void AdvanceCurrentPosition(int by)
virtual void PushRegister(int register_index, StackCheckFlag check_stack_limit)
virtual void AdvanceRegister(int reg, int by)
virtual void GoTo(Label *label)
virtual void PopRegister(int register_index)
virtual void IfRegisterEqPos(int reg, Label *if_eq)
virtual void CheckPosition(int cp_offset, Label *on_outside_input)
virtual void ClearRegisters(int reg_from, int reg_to)
virtual bool CheckSpecialCharacterClass(uc16 type, Label *on_no_match)
static int CheckStackGuardState(Address *return_address, Code *re_code, Address re_frame)
virtual Handle< HeapObject > GetCode(Handle< String > source)
RegExpMacroAssemblerMIPS(Mode mode, int registers_to_save, Zone *zone)
virtual void PushBacktrack(Label *label)
virtual void Bind(Label *label)
virtual void SetRegister(int register_index, int to)
virtual void CheckGreedyLoop(Label *on_tos_equals_current_position)
virtual void CheckCharacterLT(uc16 limit, Label *on_less)
virtual void CheckNotCharacter(uint32_t c, Label *on_not_equal)
virtual void WriteCurrentPositionToRegister(int reg, int cp_offset)
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be expose gc extension under the specified name show built in functions in stack traces use random jit cookie to mask large constants minimum length for automatic enable preparsing CPU profiler sampling interval in microseconds trace out of bounds accesses to external arrays default size of stack region v8 is allowed to maximum length of function source code printed in a stack trace min size of a semi the new space consists of two semi spaces print one trace line following each garbage collection do not print trace line after scavenger collection print cumulative GC statistics in only print modified registers Trace simulator debug messages Implied by trace sim abort randomize hashes to avoid predictable hash Fixed seed to use to hash property Print the time it takes to deserialize the snapshot A filename with extra code to be included in the A file to write the raw snapshot bytes to(mksnapshot only)") DEFINE_STRING(raw_context_file
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be expose gc extension under the specified name show built in functions in stack traces use random jit cookie to mask large constants minimum length for automatic enable preparsing CPU profiler sampling interval in microseconds trace out of bounds accesses to external arrays default size of stack region v8 is allowed to maximum length of function source code printed in a stack trace min size of a semi the new space consists of two semi spaces print one trace line following each garbage collection do not print trace line after scavenger collection print cumulative GC statistics in name
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long mode(MIPS only)") DEFINE_BOOL(enable_always_align_csp
const int kPointerSize
Definition: globals.h:129
const Register fp
byte * Address
Definition: globals.h:101
uint16_t uc16
Definition: globals.h:184
Debugger support for the V8 JavaScript engine.
Definition: accessors.cc:20