5 #ifndef V8_X64_REGEXP_MACRO_ASSEMBLER_X64_H_
6 #define V8_X64_REGEXP_MACRO_ASSEMBLER_X64_H_
16 #ifndef V8_INTERPRETED_REGEXP
26 virtual void Bind(Label* label);
54 Label* on_not_in_range);
64 virtual void GoTo(Label* label);
70 Label* on_end_of_input,
71 bool check_bounds =
true,
91 int offsets_vector_length,
98 const byte* input_start,
99 const byte* input_end,
238 inline void Push(Label* label);
Isolate * isolate() const
void Add(const T &element, AllocationPolicy allocator=AllocationPolicy())
virtual void Bind(Label *label)
Operand register_location(int register_index)
static const size_t kRegExpCodeSize
virtual void LoadCurrentCharacter(int cp_offset, Label *on_end_of_input, bool check_bounds=true, int characters=1)
void Pop(Register target)
virtual void IfRegisterEqPos(int reg, Label *if_eq)
virtual IrregexpImplementation Implementation()
virtual void PushCurrentPosition()
RegExpMacroAssemblerX64(Mode mode, int registers_to_save, Zone *zone)
virtual void AdvanceCurrentPosition(int by)
virtual Handle< HeapObject > GetCode(Handle< String > source)
virtual ~RegExpMacroAssemblerX64()
virtual void CheckCharacter(uint32_t c, Label *on_equal)
virtual void CheckNotCharacter(uint32_t c, Label *on_not_equal)
static const int kInputStartMinusOne
virtual void CheckNotCharacterAfterMinusAnd(uc16 c, uc16 minus, uc16 mask, Label *on_not_equal)
Label check_preempt_label_
Register code_object_pointer()
static const int kFrameAlign
static const int kStackHighEnd
virtual void ClearRegisters(int reg_from, int reg_to)
virtual void GoTo(Label *label)
static const int kRegisterZero
static const int kIsolate
virtual void IfRegisterGE(int reg, int comparand, Label *if_ge)
virtual void SetRegister(int register_index, int to)
static const int kStartIndex
static const int kLastCalleeSaveRegister
void FixupCodeRelativePositions()
static const int kReturn_eip
virtual void WriteCurrentPositionToRegister(int reg, int cp_offset)
void Push(Register source)
ZoneList< int > code_relative_fixup_positions_
Register backtrack_stackpointer()
static Result Match(Handle< Code > regexp, Handle< String > subject, int *offsets_vector, int offsets_vector_length, int previous_index, Isolate *isolate)
static const int kBackup_rbx
virtual void CheckCharacterLT(uc16 limit, Label *on_less)
virtual void ReadStackPointerFromRegister(int reg)
virtual void PushBacktrack(Label *label)
virtual int stack_limit_slack()
static const int kFramePointer
static const int kNumOutputRegisters
void Push(Immediate value)
void CallCheckStackGuardState()
virtual void CheckNotBackReferenceIgnoreCase(int start_reg, Label *on_no_match)
static const int kInputEnd
Register current_character()
virtual void CheckCharacterGT(uc16 limit, Label *on_greater)
static const int kDirectCall
virtual void AdvanceRegister(int reg, int by)
Label stack_overflow_label_
Isolate * isolate() const
void LoadCurrentCharacterUnchecked(int cp_offset, int character_count)
static const int kInputStart
virtual void CheckNotBackReference(int start_reg, Label *on_no_match)
virtual void CheckCharacterInRange(uc16 from, uc16 to, Label *on_in_range)
virtual void CheckNotCharacterAfterAnd(uint32_t c, uint32_t mask, Label *on_not_equal)
virtual void CheckPosition(int cp_offset, Label *on_outside_input)
virtual void IfRegisterLT(int reg, int comparand, Label *if_lt)
virtual void ReadCurrentPositionFromRegister(int reg)
static const int kInputString
virtual void PopRegister(int register_index)
static Result Execute(Code *code, String *input, int start_offset, const byte *input_start, const byte *input_end, int *output, bool at_start)
void SafeCallTarget(Label *label)
MacroAssembler::NoRootArrayScope no_root_array_scope_
virtual void CheckGreedyLoop(Label *on_tos_equals_current_position)
virtual void CheckAtStart(Label *on_at_start)
virtual void SetCurrentPositionFromEnd(int by)
virtual void CheckNotAtStart(Label *on_not_at_start)
virtual void CheckCharacterAfterAnd(uint32_t c, uint32_t mask, Label *on_equal)
virtual void PopCurrentPosition()
void BranchOrBacktrack(Condition condition, Label *to)
virtual void CheckCharacterNotInRange(uc16 from, uc16 to, Label *on_not_in_range)
static int CheckStackGuardState(Address *return_address, Code *re_code, Address re_frame)
virtual bool CheckSpecialCharacterClass(uc16 type, Label *on_no_match)
static const int kRegisterOutput
virtual void PushRegister(int register_index, StackCheckFlag check_stack_limit)
virtual void CheckBitInTable(Handle< ByteArray > table, Label *on_bit_set)
void ReadPositionFromRegister(Register dst, int reg)
void MarkPositionForCodeRelativeFixup()
virtual void WriteStackPointerToRegister(int reg)
static const int kSuccessfulCaptures
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long enable alignment of csp to bytes on platforms which prefer the register to always be expose gc extension under the specified name show built in functions in stack traces use random jit cookie to mask large constants minimum length for automatic enable preparsing CPU profiler sampling interval in microseconds trace out of bounds accesses to external arrays default size of stack region v8 is allowed to maximum length of function source code printed in a stack trace min size of a semi the new space consists of two semi spaces print one trace line following each garbage collection do not print trace line after scavenger collection print cumulative GC statistics in only print modified registers Trace simulator debug messages Implied by trace sim abort randomize hashes to avoid predictable hash Fixed seed to use to hash property Print the time it takes to deserialize the snapshot A filename with extra code to be included in the A file to write the raw snapshot bytes to(mksnapshot only)") DEFINE_STRING(raw_context_file
enable harmony numeric enable harmony object literal extensions Optimize object Array DOM strings and string trace pretenuring decisions of HAllocate instructions Enables optimizations which favor memory size over execution speed maximum source size in bytes considered for a single inlining maximum cumulative number of AST nodes considered for inlining trace the tracking of allocation sites deoptimize every n garbage collections perform array bounds checks elimination analyze liveness of environment slots and zap dead values flushes the cache of optimized code for closures on every GC allow uint32 values on optimize frames if they are used only in safe operations track concurrent recompilation artificial compilation delay in ms do not emit check maps for constant values that have a leaf deoptimize the optimized code if the layout of the maps changes enable context specialization in TurboFan execution budget before interrupt is triggered max percentage of megamorphic generic ICs to allow optimization enable use of SAHF instruction if enable use of VFP3 instructions if available enable use of NEON instructions if enable use of SDIV and UDIV instructions if enable use of MLS instructions if enable loading bit constant by means of movw movt instruction enable unaligned accesses for enable use of d16 d31 registers on ARM this requires VFP3 force all emitted branches to be in long mode(MIPS only)") DEFINE_BOOL(enable_always_align_csp
Debugger support for the V8 JavaScript engine.